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參數(shù)資料
| 型號(hào)： | XRT91L81IB |
| 廠商： | EXAR CORP |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | 2.488/2.666GBPS OC-48/STM-16 SONET/SDH TRANSCEIVER |
| 中文描述： | TRANSCEIVER, PBGA196 |
| 封裝： | 12 X 12 MM, STBGA-196 |
| 文件頁(yè)數(shù)： | 1/40頁(yè) |
| 文件大?。?/td> | 264K |
| 代理商： | XRT91L81IB |
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Exar
Corporation 48720 Kato Road, Fremont CA, 94538
(510) 668-7000
FAX (510) 668-7017
www.exar.com
PRELIMINARY
XRT91L81
2.488/2.666GBPS OC-48/STM-16 SONET/SDH TRANSCEIVER
JANUARY 2004
REV. P1.0.3
GENERAL DESCRIPTION
The XRT91L81 is a fully integrated SONET/SDH
transceiver block for applications in SONET OC-48
allowing the use of Forward Error Correction (FEC)
capability. The transceiver includes an on-chip Clock
Multiplier Unit (CMU), which uses a high frequency
Phase-Locked Loop (PLL) to generate the high-
speed transmit serial clock from slower external clock
references. It also provides Clock and Data Recovery
(CDR) functions by synchronizing its on-chip Voltage
Controlled Oscillator (VCO) to the incoming serial
data stream. The chip provides serial-to-parallel and
parallel-to-serial converters and 4-bit LVDS system
interfaces in both receive and transmit directions.
The transmit section includes a 4x9 Elastic Buffer
(FIFO) to absorb any phase differences between the
transmitter input clock and the internally generated
transmitter reference clock. In the event of an
overflow, an internal FIFO control circuit outputs an
OVERFLOW indication. The FIFO under the control
of the AUTORST pin can automatically recover from
an overflow condition. The operation of the device
can be monitored by checking the status of the
LOCKDET and LOSDET output signals. An on-chip
phase/frequency detector and charge-pump offers
the ability to form a de-jittering PLL with an external
VCXO that can be used in loop timing mode to clean
up the recovered clock in the receive section.
APPLICATIONS
SONET/SDH-based Transmission Systems
Add/Drop Multiplexers
Cross Connect Equipment
ATM and Multi-Service Switches, Routers and
Switch/Routers
DSLAMS
SONET/SDH Test Equipment
DWDM Termination Equipment
Optical Modules and Sub-Systems
F
IGURE
1. B
LOCK
D
IAGRAM
OF
THE
XRT91L81
PISO
(Parallel Input
Serial Output)
PFD
& Charge Pump
TxDI1P/N
TxDI2P/N
TxDI3P/N
S
S
Serial
Microprocessor
Hardware
Control
I
S
R
H
R
D
R
L
L
TxCLKIP/N
DLOOP
RLOOPP
RxDO0P/N
RxDO1P/N
RxDO2P/N
RxDO3P/N
RxCLKP/N
4
WP
RP
SIPO
(Serial Input
Parallel Output)
RLOOPS
CDR
Re-Timer
CMU
TXOP/N
TXO2P/N
TXO2DIS
TXO2SEL
RXI0P/N
RXI1P/N
RXSEL
R
V
R
V
V
V
C
L
TXPCLKOP/N
TXCLKO16P/N
TRITXCLKO16
L
O
FIFO_RST
TxDI0P/N
TRIRXD
REXT
RXCLK16P/N
DISRD
L
L
L
P
0
1
0
1
OC-48 TRANSCEIVER
C
T
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XRT91L82 | 2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER |
| XRT91L82IB | 2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER |
| XRT94L31_07 | 3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC |
| XRT94L31 | 3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER |
| XRT94L31IB | 3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT91L82 | 制造商:EXAR 制造商全稱:EXAR 功能描述:2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER |
| XRT91L82ES | 功能描述:總線收發(fā)器 Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| XRT91L82IB | 功能描述:總線收發(fā)器 Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| XRT91L82IB-F | 功能描述:總線收發(fā)器 Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| XRT94L31 | 制造商:EXAR 制造商全稱:EXAR 功能描述:3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC |
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