參數(shù)資料
型號(hào)： XRT91L80
廠商： Exar Corporation
英文描述： 2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
中文描述： 2.488/2.666 Gbps的STS-48/STM-16的SONET / SDH收發(fā)器
文件頁(yè)數(shù)： 12/45頁(yè)
文件大?。?/td> 359K
代理商： XRT91L80
XRT91L80
2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
PRELIMINARY
xr
REV. P1.1.0
10
POLARITY
LVTTL,
LVCMOS
I
C4
Polarity for SDEXT Input
Controls the Signal Detect polarity convention of SDEXT.
"Low" = SDEXT is active "Low."
"High" = SDEXT is active "High."
This pin is provided with an internal pull-down.
LOSDET
LVCMOS
O
C5
LOS Detect Condition
Flags LOSD condition based on SDEXT signal coming from the
optical module.
"Low" = No Alarm
"High" = A LOS condition is present
LOSDMUTE
LVTTL,
LVCMOS
I
A3
Parallel Receive Data Output Mute Upon LOSD
If this pin is asserted "High", the receive data output will auto-
matically be forced to a logic state of "0" when an LOSD condi-
tion occurs.
"Low" = Disabled
"High" = Mute RXDO[3:0]P/N Data Upon LOSD Condition
This pin is provided with an internal pull-down.
POWER AND GROUND
N
AME
T
YPE
P
IN
D
ESCRIPTION
VDD3.3
PWR
A8, D9, D10, D11, E11,
P13, P14
CMOS Digital 3.3V I/O Power Supply
VDD3.3 should be isolated from the analog power supplies. For
best results, use a ferrite bead along with an internal power plane
separation. The VDD3.3 power supply pins should have bypass
capacitors to the nearest ground.
AVDD3.3_RX
PWR
D3, E3
Analog 3.3V I/O Receiver Power Supply
AVDD3.3_RX should be isolated from the digital power supplies.
For best results, use a ferrite bead along with an internal power
plane separation. The AVDD3.3_RX power supply pins should
have bypass capacitors to the nearest ground.
AVDD3.3_TX
PWR
P5, P9
Analog 3.3V I/O Transmitter Power Supply
AVDD3.3_TX should be isolated from the digital power supplies.
For best results, use a ferrite bead along with an internal power
plane separation. The AVDD3.3_TX power supply pins should
have bypass capacitors to the nearest ground.
VDD1.8
PWR
A13, B7, B13, D12, E12,
K11, L9, L10, M9, M10,
M11
CMOS Digital 1.8V Core Power Supply
VDD1.8 should be isolated from the analog power supplies. For
best results, use a ferrite bead along with an internal power plane
separation. The VDD1.8 power supply pins should have bypass
capacitors to the nearest ground.
AVDD1.8_RX
PWR
D4, D5, D6, D8, F3, G3
Analog 1.8V Core Receiver Power Supply
AVDD1.8_RX should be isolated from the digital power supplies.
For best results, use a ferrite bead along with an internal power
plane separation. The AVDD1.8_RX power supply pins should
have bypass capacitors to the nearest ground.
RECEIVER SECTION
N
AME
L
EVEL
T
YPE
P
IN
D
ESCRIPTION
相關(guān)PDF資料
PDF描述
XRT91L80_0507 2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
XRT91L80IB 2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
XRT91L81 2.488/2.666GBPS OC-48/STM-16 SONET/SDH TRANSCEIVER
XRT91L81IB 2.488/2.666GBPS OC-48/STM-16 SONET/SDH TRANSCEIVER
XRT91L82 2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XRT91L80_0507 制造商:EXAR 制造商全稱:EXAR 功能描述:2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
XRT91L80ES 功能描述:總線收發(fā)器 Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
XRT91L80IB 功能描述:總線收發(fā)器 Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
XRT91L80IB-F 功能描述:總線收發(fā)器 Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
XRT91L81 制造商:EXAR 制造商全稱:EXAR 功能描述:2.488/2.666GBPS OC-48/STM-16 SONET/SDH TRANSCEIVER
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