參數(shù)資料
型號(hào)： XRT91L80
廠商： Exar Corporation
英文描述： 2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
中文描述： 2.488/2.666 Gbps的STS-48/STM-16的SONET / SDH收發(fā)器
文件頁數(shù)： 20/45頁
文件大?。?/td> 359K
代理商： XRT91L80
XRT91L80
2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
PRELIMINARY
xr
REV. P1.1.0
18
3.0
TRANSMIT SECTION
The transmit section of the XRT91L80 accepts 4-bit parallel LVDS data and converts it to serial CML data
output intented to interface to an optical module. It consists of a 4-bit parallel LVDS interface, a 4x9 FIFO,
Parallel-to-Serial Converter, a clock multiplier unit (CMU), a Current Mode Logic (CML) differential line driver,
and Loop Timing modes. The CML serial data output rate is 2.488/2.666 Gbps for STS-48/STM-16
applications. The high frequency serial clock is synthesized by a PLL, which uses a low frequency clock as its
input reference. In order to synchronize the data transfer process, the synthesized 2.488/2.666 GHz serial
clock output is divided by four and the 622.08/666.51 MHz clock is presented to the upstream device to be
used as its timing source.
3.1
Transmit Parallel Input Interface
The parallel data from an upstream device is presented to the XRT91L80 through a 4-bit LVDS parallel bus
interface TXDI[3:0]P/N. The data is latched into a parallel input register on the rising edge of TXPCLKIP/N. If
the SONET Framer/ASIC is synchronized to the same timing source as the XRT91L80, the transmit data and
clock input can directly interface to the STS-48/STM-16 transceiver. However, if the SONET Framer/ASIC is
synchronized to a separate crystal, the XRT91L80 has two clock output references that can be used to
synchronize the SONET Framer/ASIC. TXPCLKOP/N is a 622.08/666.51 MHz LVDS clock output source that
is derived from the CMU synthesized high-speed clock. TXCLKO16P/N is a 155.52/166.63 MHz LVDS
auxiliary clock output source that is also derived from the CMU synthesized high-speed clock. Either of these
two clock output sources can be used to synchronize the SONET Framer/ASIC to the XRT91L80. If the
auxiliary clock source is not used, it can be disabled by pulling TXCLKO16DIS "High". A simplified block
diagram of the parallel interface is shown in Figure 9.
F
IGURE
9. T
RANSMIT
P
ARALLEL
I
NPUT
I
NTERFACE
B
LOCK
SONET Framer/ASIC
TXDI0P/N
TXDI1P/N
TXDI3P/N
TXDI2P/N
TXPCLKIP/N
TXPCLKOP/N
TXCLKO16P/N
TXCLKO16DISP/N
XRT91L80
STS-48/STM-16
Transceiver
相關(guān)PDF資料
PDF描述
XRT91L80_0507 2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
XRT91L80IB 2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
XRT91L81 2.488/2.666GBPS OC-48/STM-16 SONET/SDH TRANSCEIVER
XRT91L81IB 2.488/2.666GBPS OC-48/STM-16 SONET/SDH TRANSCEIVER
XRT91L82 2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XRT91L80_0507 制造商:EXAR 制造商全稱:EXAR 功能描述:2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
XRT91L80ES 功能描述:總線收發(fā)器 Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
XRT91L80IB 功能描述:總線收發(fā)器 Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
XRT91L80IB-F 功能描述:總線收發(fā)器 Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
XRT91L81 制造商:EXAR 制造商全稱:EXAR 功能描述:2.488/2.666GBPS OC-48/STM-16 SONET/SDH TRANSCEIVER
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