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參數(shù)資料
| 型號： | XWM8728EDS |
| 廠商： | Wolfson Microelectronics |
| 英文描述： | 24-bit, 192kHz Stereo DAC with Volume Control and DSD Support |
| 中文描述： | 24位，192kHz立體聲DAC，具有音量控制和渠務(wù)署支持 |
| 文件頁數(shù)： | 15/28頁 |
| 文件大?。?/td> | 266K |
| 代理商： | XWM8728EDS |
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WM8728
Product Preview
WOLFSON MICROELECTRONICS LTD
PP Rev 1.2 April 2001
15
HARDWARE DSD MODE
DSD mode is selected by taking the SCKDSD pin high whilst the MODE pin is low. In this mode
the internal digital filters are bypassed, and the already modulated bitstream data is applied
directly to the Switched Capacitor DAC filter where it is converted and lowpass filtered, see Figure
26 to Figure 29.
Two formats are supported for data transfer, MONOPHASE or BIPHASE MODULATED.
In Monophase mode, DSD data is simply clocked into the device using the rising edge of the 64fs
MCLK signal.
In Biphase mode, the data is supplied in Manchester encoded form (a bit transition occurs during
every data bit, which shapes the spectral energy minimising corruption of the analogue outputs).
A secondary clock BCKIN, at 128fs is used to simplify data recovery, the data simply being
clocked with the falling edge of BCKIN when MCLK is at logic low (0V).
See Figure 3 and Figure 4 for details of DSD interface timing.
HARDWARE CONTROL MODES
When the MODE pin is held low, the following hardware modes of operation are available.
MUTE AND AUTOMUTE OPERATION
In both hardware and software modes, pin 17 (MUTEB) controls the selection of MUTE directly,
and can be used to enable and disable the automute function. This pin becomes an output when
left floating and indicates infinite ZERO detect (IZD) see also pin 5 (ZERO).
MUTEB PIN
0
1
Floating
DESCRIPTION
Mute DAC channels
Normal Operation
Enable IZD, MUTEB becomes an output to indicate when IZD occurs.
L=IZD detected, H=IZD not detected.
Table 2 Mute and Automute Control
Figure 12 shows the application and release of MUTE whilst a full amplitude sinusoid is being
played at 48kHz sampling rate. When MUTE (lower trace) is asserted, the output (upper trace)
begins to decay exponentially from the DC level of the last input sample. The output will decay
towards V
MID
with a time constant of approximately 64 input samples. When MUTE is de-
asserted, the output will restart almost immediately from the current input sample.
-2.5
-2
-1.5
-1
-0.5
0.5
1
1.5
0
0.001
0.002
0.003
0.004
0.005
0.006
Time(s)
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| XWM8728EDS/R | 制造商:WOLFSON 制造商全稱:WOLFSON 功能描述:24-bit, 192kHz Stereo DAC with Volume Control |
| XWM8729ED | 制造商:WOLFSON 制造商全稱:WOLFSON 功能描述:24-bit, 192kHz Stereo DAC |
| XWM8731EDS | 制造商:WOLFSON 制造商全稱:WOLFSON 功能描述:Portable Internet Audion CODEC with Headphone Driver and Programmable Sample Rates |
| XWM8733ED | 制造商:WOLFSON 制造商全稱:WOLFSON 功能描述:102dB Stereo DAC |
| XWM8734EDS | 功能描述:接口—CODEC Stereo CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
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