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YSS944/943/940
7
Type
Pin
No.
Pin Name
I/O
Note 1)
Function
61
62
69
77
78
86
87
93
94
105
106
117
118
123
129
130
139
140
1
AHVSS
Ground pin 2 for PLL analog block.
Be sure to insert a 0.1
F capacitor between the AHVDD and AHVSS
pins.
2
AHVSSG
Ground pin 3 for PLL analog block.
Be sure to insert a 0.1
F capacitor between the AHVDDG and
AHVSSG pins.
3
DVSS
Ground pin for PLL digital block.
Be sure to insert a 0.1
F capacitor between the DVDD and DVSS
pins.
141
AVSSR
Ground pin 1 for PLL analog block.
Be sure to insert a 0.1
F capacitor between the AVDDR and AVSSR
pins.
Initial clear
131
nIC
Is
Hardware reset input pin
The LSI is initialized when this pin is at low level.
18
XI
I
Clock input pin.
Connect this pin as shown in the circuit example Note 2) of the
12.288 MHz crystal oscillator.
If not connected to a crystal oscillator, input a 12.288 MHz clock to
this pin.
Clock
19
XO
O
This is the output pin for the crystal oscillator.
Connect this pin as shown in the circuit example Note 2).
If not connected to a crystal oscillator and inputting directly to the XI
pin, do not connect anything to this pin. Do not use this pin for any
purpose other than clock oscillation.
126
nMICS
Is
This is the microprocessor interface’s chip select input pin.
Input to the MISCK and MISI pins becomes valid when this pin is at
low level.
125
MISCK
Is
This is the microprocessor interface’s clock input pin.
124
MISI
I
This is the microprocessor interface’s address read/write control and
data input pin.
Microprocessor
interface
122
MISO
Ot
This is the microprocessor interface’s data output pin.
Connect a pull-up resistor.
32
SDIMCK
Is
This is the master clock input pin for the audio interface’s input side.
The master clock is input from DIR, ADC, etc.
The highest clock frequency that can be input is 25 MHz.
(The clock rate is 512 fs when the input sampling frequency is 48 kHz
or less, 256 fs when the frequency is 96 kHz, and 128 fs when the
frequency is up to 192 kHz.)
Audio interface
31
SDIBCK
Is
This is the bit clock I/O pin for the audio interface’s input side.