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參數(shù)資料
| 型號(hào)： | Z86C83 |
| 廠商： | ZiLOG, Inc. |
| 英文描述： | CMOS Z8 Microcontroller(CMOS Z8系列微控制器) |
| 中文描述： | 微控制器的CMOS Z8的CMOS（Z8系列微控制器） |
| 文件頁數(shù)： | 37/52頁 |
| 文件大?。?/td> | 338K |
| 代理商： | Z86C83 |
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Z86C83/C84/E83
CMOS Z8
MCU
Zilog
DS97DZ80700
P R E L I M I N A R Y
8-37
1
Digital-to-Analog Converters
The Z86C84 has two Digital-to-Analog Converters
(DACs). Each DAC is an 8-bit resistor string, with a pro-
grammable 0.25X, 0.5X, or 1X gain output buffer. The
DAC output voltage settles after the internal data is latched
into the DAC Data register. The top and bottom ends of the
resistor ladder are register-selected to be connected to ei-
ther the analog supply rails, AV
CC
and A
GND
, or two exter-
nally-provided reference voltages, VDHI and VDLO. Exter-
nal references are recommended to explicitly set the DAC
output limits. Since the gain stage cannot drive to the sup-
ply rails, VDHI and VDLO must be within ranges shown in
the specifications. If either reference approaches the ana-
log supply rails, the output will be unable to span the refer-
ence voltage range. The externally provided reference
voltages should not exceed the supply voltages. The DAC
outputs are latch-up protected and can drive output loads
(Figure 28).
Note:
The AV
CC
must be the same value as V
CC
and
A
GND
must be the same value as GND
Figure 28. DAC Block Diagram
Programmable
Gain
Data
Bus
8-Bit
Resistor
Ladder
8
8
DACn
Data
Register
DACRn
Control
Register
8
Analog
+
-
AVCC
DAC1
or
DAC2
* Bits 0, 1
AGND
PAD
PAD
VDLO
High
PAD
VDHI
Note:
* DACRn Control Register Bits
Low
(n = 1 or 2)
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