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參數(shù)資料
| 型號(hào)： | Z8S18033VEC |
| 廠商： | ZILOG INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | CONN HDR INVERSE 30POS 5ROW R/A |
| 中文描述： | 8-BIT, MICROPROCESSOR, PQCC68 |
| 封裝： | PLASTIC, LCC-68 |
| 文件頁數(shù)： | 12/70頁 |
| 文件大?。?/td> | 387K |
| 代理商： | Z8S18033VEC |
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Z80180/Z8S180/Z8L180
Enhanced Z180 Microprocessor
Zilog
1-12
P R E L I M I N A R Y
DS971800401
ARCHITECTURE
The Z180
combines a high-performance CPU core with a
variety of system and I/O resources useful in a broad
range of applications. The CPU core consists of five func-
tional blocks: clock generator, bus state controller, Inter-
rupt controller, memory management unit (MMU), and the
central processing unit (CPU). The integrated I/O resourc-
es make up the remaining four function blocks: direct
memory access (DMA) control (2 channels), asynchro-
nous serial communication interface (ASCI, 2 channels)
programmable reload timers (PRT, 2 channels), and a
clock serial I/O (CSIO) channel.
Clock Generator.
Generates system clock from an exter-
nal crystal or clock input. The external clock is divided by
two or one and provided to both internal and external de-
vices.
Bus State Controller.
This logic performs all of the status
and bus control activity associated with both the CPU and
some on-chip peripherals. This includes wait-state timing,
reset cycles, DRAM refresh, and DMA bus exchanges.
Interrupt Controller.
This logic monitors and prioritizes
the variety of internal and external interrupts and traps to
provide the correct responses from the CPU. To maintain
compatibility with the Z80
CPU, three different interrupts
modes are supported.
Memory Management Unit.
The MMU allows the user to
“map” the memory used by the CPU (logically only 64KB)
into the 1 MB addressing range supported by the
Z80180/Z8S180/Z8L180. The organization of the MMU
object code maintains compatibility with the Z80 CPU,
while offering access to an extended memory space. This
is accomplished by using an effective “common area-
banked area” scheme.
Central Processing Unit.
The CPU is microcoded to pro-
vide a core that is object-code compatible with the Z80
CPU. It also provides a superset of the Z80 instruction set,
including 8-bit multiply. The core has been modified to al-
low many of the instructions to execute in fewer clock cy-
cles.
DMA Controller.
The DMA controller provides high speed
transfers between memory and I/O devices. Transfer op-
erations supported are memory-to-memory, memory
to/from I/O, and I/O-to-I/O. Transfer modes supported are
request, burst, and cycle steal. DMA transfers can access
the full 1 MB address range with a block length up to 64
KB, and can cross over 64K boundaries.
Asynchronous Serial Communication Interface (AS-
CI).
The ASCI logic provides two individual full-duplex
UARTs. Each channel includes a programmable baud rate
generator and modem control signals. The ASCI channels
can also support a multiprocessor communication format
as well as break detection and generation.
Programmable Reload Timers (PRT).
This logic consists
of two separate channels, each containing a 16-bit counter
(timer) and count reload register. The time base for the
counters is derived from the system clock (divided by 20)
before reaching the counter. PRT channel 1 provides an
optional output to allow for waveform generation.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| Z8S18033VSC | CONN HDR INVERSE 120POS 5ROW R/A |
| Z8S180 | CAP 0.1UF 100V +80-20% Z5U AXIAL TR-14 |
| Z8S18006FEC | CAP 1UF 50V 10% X7R AXIAL TR-14 |
| Z8S18006FSC | CAP 0.47UF 50V 10% X7R AXIAL TR-14 |
| Z8S18006PEC | CAP 0.1UF 50V 2% NP0(C0G) AXIAL TR-14 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| Z8S18033VEC00TR | 功能描述:IC Z180 MPU 68PLCC RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:Z180 標(biāo)準(zhǔn)包裝:40 系列:MPC83xx 處理器類型:32-位 MPC83xx PowerQUICC II Pro 特點(diǎn):- 速度:267MHz 電壓:0.95 V ~ 1.05 V 安裝類型:表面貼裝 封裝/外殼:516-BBGA 裸露焊盤 供應(yīng)商設(shè)備封裝:516-PBGAPGE（27x27） 包裝:托盤 |
| Z8S18033VEG | 功能描述:微處理器 - MPU 33MHz STATIC Z180 XT RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| Z8S18033VSC | 功能描述:微處理器 - MPU 33MHz STATIC Z180 RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| Z8S180-33VSC | 制造商:Zilog Inc 功能描述:IC CPU (Z80B) SMD 8S180 PLCC68 |
| Z8S18033VSC00TR | 功能描述:IC Z180 MPU 68PLCC RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:Z180 標(biāo)準(zhǔn)包裝:40 系列:MPC83xx 處理器類型:32-位 MPC83xx PowerQUICC II Pro 特點(diǎn):- 速度:267MHz 電壓:0.95 V ~ 1.05 V 安裝類型:表面貼裝 封裝/外殼:516-BBGA 裸露焊盤 供應(yīng)商設(shè)備封裝:516-PBGAPGE（27x27） 包裝:托盤 |
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