CHAPTER 15 SERIAL INTERFACE CHANNEL 1
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(c) Bit slippage detection function with busy signal
During automatic transmission/reception, bit slippage may take place in the serial clock of the slave
device due to the noise carried on the serial clock signal output by the master device. Unless the strobe
control option is used at this time, the bit slippage affects transmission of the next byte. In such a case,
the master device can detect the bit slippage by using the busy control option and checking the busy
signal during transmission.
The bit slippage is detected by using the busy signal as follows:
The slave outputs a busy signal after the 8th rise of the serial clock during data transmission/reception
(at this time, make the busy signal inactive within two clocks not to make the master device put
transmission/reception into a wait state).
The master samples the busy signal in synchronization with the fall of the serial clock. If bit slippage
does not occur, the busy signal is found to be inactive after it has been sampled eight times. If the busy
signal is found to be active when it has been sampled, it is assumed that bit slippage has occurred,
and error processing is performed (by setting bit 4 (ERR) of the automatic data transmit/receive control
register (ADTC) to 1).
Figure 15-22 shows the operation timings of the bit slippage detection function using the busy signal.
Figure 15-22. Operation Timings of Bit Slippage Detection Function Using Busy Signal (BUSY0 = 1)
SCK1
D7
SO1
SI1
D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1
D0
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1
D0
BUSY
CSIIF1
CSIE1
ERR
D7
D7
No busy detection
Error interrupt request generation
Error detection
Bit slippage due to noise
(Slave side)
SCK1
(Master side)
Remark
CSIIF1 : Interrupt request flag
CSIE1 : Bit 7 of the serial operating mode register 1 (CSIM1)
ERR : Bit 4 of the automatic data transmit/receive control register (ADTC)