CHAPTER 3 CPU ARCHITECTURE
45
Table 3-4. Special Function Register List (2/3)
Manipulatable
Bit Unit
Address
Special Function Register (SFR) Name
Symbol
R/W
After Reset
1 Bit 8 Bits
16 Bits
FF40H
Timer clock select register 0
TCL0
R/W
√
√
√
√
√
√
–
00H
FF41H
Timer clock select register 1
TCL1
–
–
FF42H
Timer clock select register 2
TCL2
–
–
FF43H
Timer clock select register 3
TCL3
–
–
88H
FF47H
Sampling clock select register
SCS
–
√
√
√
√
√
√
√
–
00H
FF48H
16-bit timer mode control register
TMC0
√
–
FF49H
8-bit timer mode control register
TMC1
√
–
FF4AH
Watch timer mode control register
TMC2
√
–
FF4EH
16-bit timer output control register
TOC0
√
–
FF4FH
8-bit timer output control register
TOC1
√
–
FF60H
Serial operating mode register 0
CSIM0
√
–
FF61H
Serial bus interface control register
SBIC
√
√
–
FF62H
Slave address register
SVA
–
√
√
√
–
Undefined
FF63H
Interrupt timing specify register
SINT
√
–
00H
FF68H
Serial operating mode register 1
CSIM1
√
–
FF69H
Automatic data transmit/receive control register
ADTC
√
√
–
FF6AH
Automatic data transmit/receive address pointer
ADTP
–
–
FF6BH
Automatic data transmit/receive interval specify
register
ADTI
FF80H
A/D converter mode register
ADM
√
√
√
√
√
–
01H
FF84H
A/D converter input select register
ADIS
–
–
00H
FFA0H
Display mode register 0
DSPM0
Note
–
FFA1H
Display mode register 1
DSPM1
–
√
–
FFA8H
6-bit up/down counter mode register
UDM
√
√
√
–
FFA9H
6-bit up/down counter
UDC
–
–
FFAAH
6-bit up/down counter compare register
UDCC
–
√
√
√
√
√
√
–
–
FFE0H
Interrupt request flag register 0L
IF0
IF0L
√
√
FFE1H
Interrupt request flag register 0H
IF0H
√
FFE4H
Interrupt mask flag register 0L
MK0
MK0L
√
√
FFH
FFE5H
Interrupt mask flag register 0H
MK0H
√
FFE8H
Priority order specify flag register 0L
PR0
PR0L
√
√
FFE9H
Priority order specify flag register 0H
PR0H
√
√
FFECH
External interrupt mode register
INTM0
–
00H
Note
Only bit 7 enables for read-only operation.