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CHAPTER 3 CPU ARCHITECTURE
3.6 Memory Mapping of
m
PD78F4046
The
m
PD78F4046 has 64K bytes of flash memory and 2048 bytes of internal RAM.
The
m
PD78F4046 has a function to not use part of the internal memory (memory size select function). This function is
effected by software.
The memory size is changed by using the internal memory size select register (IMS).
This register can be read or written by using an 8-bit manipulation instruction. Data can be only written to the IMS of
the
m
PD78F4046, however. The IMS of the
m
PD784044 and 784046 retains the value at reset even if data is written to it.
Therefore, the value of the IMS at RESET differs depending on the model. In the case of the
m
PD784044, it is CDH.
The value of the IMS of the
m
PD784046 and 78F4046 is set to DEH at RESET.
Figure 3-4. Format of Internal Memory Size Select Register (IMS)
Note
The value at reset differs depending on the model.
m
PD784044
m
PD784046, 78F4046 : DEH
: CDH
Cautions 1. Writing to the internal memory size select register (IMS) is valid only with the
m
PD78F4046. The
IMS of the
m
PD784044 and 784046 holds the value at RESET even if data is written to it.
2. To develop a program for the
m
PD784044 using the
m
PD78F4046, set the value of the IMS to CDH.
When the value of the IMS is set to CDH, the peripheral RAM capacity of the
m
PD78F4046 is 768
bytes, but the peripheral RAM capacity of the
m
PD784044 is 512 bytes. When using a mask ROM,
therefore, exercise care that addresses 0FA00H through 0FAFFH of the peripheral RAM area of the
m
PD78F4046 are not used (when the LOCATION 0 instruction is executed).
1
1
ROM1 ROM0
1
1
RAM1 RAM0
7
6
5
4
3
2
1
0
IMS
ROM1
0
0
Selects Internal ROM Capacity
32K bytes
Invalid
Setting prohibited
ROM0
0
1
PD784044 PD784046
PD78F4046
Invalid
64K bytes
32K bytes
64K bytes
Others
RAM1
0
1
Selects Peripheral RAM Capacity
512 bytes
Invalid
Setting prohibited
RAM0
1
0
PD784044 PD784046
PD78F4046
Invalid
1.5K bytes
768 bytes
1.5K bytes
Others
Address : 0FFFCH On reset :
Note
R/W