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| 型號： | 1200 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 無繩電話/電話 |
| 英文描述： | TELECOM, CELLULAR, RF AND BASEBAND CIRCUIT, QCC20 |
| 封裝： | 4 X 4 MM, ROHS COMPLIANT, QLP-20 |
| 文件頁數(shù)： | 28/70頁 |
| 文件大?。?/td> | 841K |
| 代理商： | 1200 |
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Chipcon
SmartRF CC1100
Chipcon AS
SmartRF
CC1100 Preliminary Data Sheet (rev. 1.0) 2005-04-25
Page 34 of 68
28 Data FIFO
The
CC1100 contains two 64 byte FIFOs, one
for received data and one for data to be
transmitted. The SPI interface is used to read
from the RX FIFO and write to the TX FIFO.
Section 18.4 contains details on the SPI FIFO
access. The FIFO controller will detect
overflow in the RX FIFO and underflow in the
TX FIFO.
When writing to the TX FIFO it is the
responsibility of the MCU to avoid TX FIFO
overflow. This will not be detected by the
CC1100.
Likewise, when reading the RX FIFO the MCU
must avoid reading the RX FIFO past its empty
value, since this will lead to an error that is not
detected by the
CC1100.
The chip status byte that is available on the SO
pin while transferring the SPI address contains
the fill grade of the RX FIFO if the address is a
read operation and the fill grade of the TX
FIFO is the address is a write operation.
on this.
The number of bytes in the RX FIFO and TX
FIFO can also be read from the status
registers
and
respectively.
The 4-bit FIFOTHR.FIFO_THR setting is used
to program threshold points in the FIFOs.
the corresponding thresholds for the RX and
TX FIFOs. The threshold value is coded in
opposite directions for the RX FIFO and TX
FIFO. This gives equal margin to the overflow
and underflow conditions when the threshold
is reached.
A flag will assert when the number of bytes in
the FIFO is equal to or higher than the
programmed threshold. The flag is used to
generate the FIFO status signals that can be
viewed on the GDO pins (see Section 35 on
page 38).
Figure 14 shows the number of bytes in both
the RX FIFO and TX FIFO when the threshold
flag toggles, in the case of FIFO_THR=13.
Figure 13 shows the flag as the respective
FIFO is filled above the threshold, and then
drained below.
53 54 55 56
53
54
55
56
57
6
7
8
9
6
7
8
9
10
NUM_RXBYTES
GDO
NUM_TXBYTES
GDO
Figure 13: FIFO_THR=13 vs. number of bytes
in FIFO
FIFO_THR
Bytes in TX FIFO
Bytes in RX FIFO
0 (0000)
61
4
1 (0001)
57
8
2 (0010)
53
12
3 (0011)
49
16
4 (0100)
45
20
5 (0101)
41
24
6 (0110)
37
28
7 (0111)
33
32
8 (1000)
29
36
9 (1001)
25
40
10 (1010)
21
44
11 (1011)
17
48
12 (1100)
13
52
13 (1101)
9
56
14 (1110)
5
60
15 (1111)
1
64
Table 23: FIFO_THR settings and the
corresponding FIFO thresholds
56 bytes
8 bytes
Overflow
margin
Underflow
margin
FIFO_THR=13
RXFIFO
TXFIFO
Figure 14: Example of FIFOs at threshold
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