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| 型號： | 1200 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 無繩電話/電話 |
| 英文描述： | TELECOM, CELLULAR, RF AND BASEBAND CIRCUIT, QCC20 |
| 封裝： | 4 X 4 MM, ROHS COMPLIANT, QLP-20 |
| 文件頁數(shù)： | 35/70頁 |
| 文件大?。?/td> | 841K |
| 代理商： | 1200 |
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Chipcon
SmartRF CC1100
Chipcon AS
SmartRF
CC1100 Preliminary Data Sheet (rev. 1.0) 2005-04-25
Page 40 of 68
36 Asynchronous and Synchronous Serial Operation
Several features and modes of operation have
been included in the
CC1100 to provide
backward compatibility with previous Chipcon
products and other existing RF communication
systems. For new systems, it is recommended
to use the built-in packet handling features, as
they can give more robust communication,
significantly offload the microcontroller and
simplify software development.
36.1
Asynchronous operation
For backward compatibility with systems
already using the asynchronous data transfer
from other Chipcon products, asynchronous
transfer is also included in
CC1100. When
asynchronous transfer is enabled, several of
the support mechanisms for the MCU that are
included in
CC1100 will be disabled, such as
packet handling hardware, buffering in the
FIFO and so on. The asynchronous transfer
mode does not allow the use of the data
whitener, interleaver and FEC.
Only 2-FSK, GFSK and ASK/OOK are
supported for asynchronous transfer.
Setting
to
3
enables asynchronous transparent (serial)
mode.
In TX, the GDO0 pin is used for data input (TX
data). Data output can be GDO0, GDO1 or
GDO2
.
The MCU must control start and stop of
transmit and receive with the STX, SRX and
SIDLE
strobes.
The
CC1100 modulator samples the level of the
asynchronous input 8 times faster than the
programmed data rate. The timing requirement
for the asynchronous stream is that the error in
the bit period must be less than one eighth of
the programmed data rate.
36.2
Synchronous serial operation
In the Synchronous serial operation mode,
data is transferred on a two wire serial
interface. The
CC1100 provides a clock that is
used to set up new data on the data input line
or sample data on the data output line. Data
input (TX data) is the GDO0 pin. This pin will
automatically be configured as an input when
TX is active. The data output pin can be any of
the
GDO
pins;
this
is
set
by
the
and IOCFG2.GDO2_CFG fields.
Preamble and sync word insertion/detection
may or may not be active, dependent on the
sync mode set by the MDMCFG3.SYNC_MODE.
If preamble and sync word is disabled, all
other packet handler features and FEC should
also be disabled. The MCU must then handle
preamble and sync word insertion and
detection in software. If preamble and sync
word insertion/detection is left on, all packet
handling features and FEC can be used. The
CC1100 will insert and detect the preamble and
sync word and the MCU will only provide/get
the data payload. This is equivalent to the
recommended FIFO operation mode.
37 Configuration Registers
The configuration of
CC1100 is done by
programming 8-bit registers. The configuration
data based on selected system parameters
are most easily found by using the SmartRF
Studio software. Complete descriptions of the
registers are given in the following tables. After
chip reset, all the registers have default values
as shown in the tables.
There are 14 Command Strobe Registers,
listed in Table 28. Accessing these registers
will initiate the change of an internal state or
mode. There are 47 normal 8-bit Configuration
Registers, listed in Table 29. Many of these
registers are for test purposes only, and need
not be written for normal operation of
CC1100.
There are also 12 Status registers, which are
listed in Table 30. These registers, which are
read-only, contain information about the status
of
CC1100.
The two FIFOs are accessed through one 8-bit
register. Write operations write to the TX FIFO,
while read operations read from the RX FIFO.
During the address transfer and while writing
to a register or the TX FIFO, a status byte is
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