參數(shù)資料
型號: 20-101-0358
廠商: Rabbit Semiconductor
文件頁數(shù): 25/94頁
文件大?。?/td> 0K
描述: COMPUTER SINGLE-BOARD BL1820
標(biāo)準(zhǔn)包裝: 1
系列: Jackrabbit
模塊/板類型: 單板計(jì)算機(jī)模塊
適用于相關(guān)產(chǎn)品: BL1820
產(chǎn)品目錄頁面: 618 (CN2011-ZH PDF)
其它名稱: 316-1081
User’s Manual
27
The resolution of the DA0 output depends on the smallest increment of time to change the
on/off time (the time between 5 V and 0 V). The Jackrabbit uses the Rabbit 2000’s Port D
control registers to clock out the signal at a timer timeout. The timer used is timer B.
Timer B has 10 bits of resolution so that the voltage can be varied in 1/1024 increments.
The resolution is thus about 3.88 mV for the DA0 output voltage range of 0 V to 3 V in the
12%–88% duty cycle.
An LM324 op amp, which can comfortably source 10 mA throughout the D/A converter
range, drives the D/A converter output. If the output voltage is above 1 V, the D/A con-
verter can comfortably sink 10 mA. Below 1 V, the D/A converter can only sink a maxi-
mum of 100 A.
The peak-to-peak ripple on DA0 is less than 3 mV. There is a way to get rid of the ripple
for very small periods of time. To do that, simply program the PWM port from a PWM
output to a high-impedance input. This will allow the capacitor to hold the voltage subject
only to leakage currents, which add up to about 1 A. This will cause the capacitor to
change voltage at the rate of 10 V per second, or 10 mV per millisecond. Practically, this
means that the PWM can stop for about 1 ms (seven 1024-count D/A converter cycles on
a 14.74 MHz processor clock) with a voltage movement of less than 10 mV.
To summarize, DA0 is provided uncalibrated, can be programmed with a resolution of
3.88 mV and a peak-to-peak ripple less than 3 mV over the range from 0.1 V to 2.8 V and
at 3.35 V. The settling time to within 3 mV is 54 ms.
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