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參數(shù)資料
| 型號(hào)： | 20-101-0358 |
| 廠(chǎng)商： | Rabbit Semiconductor |
| 文件頁(yè)數(shù)： | 90/94頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | COMPUTER SINGLE-BOARD BL1820 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | Jackrabbit |
| 模塊/板類(lèi)型： | 單板計(jì)算機(jī)模塊 |
| 適用于相關(guān)產(chǎn)品： | BL1820 |
| 產(chǎn)品目錄頁(yè)面： | 618 (CN2011-ZH PDF) |
| 其它名稱(chēng)： | 316-1081 |
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Jackrabbit (BL1800)
Transistors Q20 and Q21 are of opposite polarity so that a rail-to-rail voltages can be
passed. When the /CS1 voltage is low, Q20 will conduct. When the /CS1 voltage is high,
Q21 will conduct. It takes time for the transistors to turn on, creating a propagation delay.
This delay is typically very small, about 10 ns to 15ns.
The signal that turns the transistors on is a high on the processor’s reset line, /RES. When
the Jackrabbit is not in reset, the reset line will be high, turning on N-channel Q20 and
Q22. Q22 is a simple inverter needed to turn on Q21, an P-channel MOSFET. When a
reset occurs, the /RES line will go low. This will cause C23 to discharge through R42 and
R40. This small delay (about 160 s) ensures that there is adequate time for the processor
to write any last byte pending to the SRAM before the processor puts itself into a reset
state. When coming out of reset, CS will be enabled very quickly because D20 conducts to
charge capacitor C23.
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