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參數(shù)資料
| 型號： | 20-101-0494 |
| 廠商： | Rabbit Semiconductor |
| 文件頁數(shù)： | 19/90頁 |
| 文件大?。?/td> | 0K |
| 描述： | MODULE RABBITCORE RCM2250 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | RabbitCore® |
| 模塊/板類型： | MPU 核心模塊 |
| 適用于相關(guān)產(chǎn)品： | RCM2250 |
| 產(chǎn)品目錄頁面： | 620 (CN2011-ZH PDF) |
| 其它名稱： | 316-1092 |
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20
RabbitCore RCM2200
The RCM2200 has 26 parallel I/O lines grouped in five 8-bit ports available on headers J4
and J5. The 16 bidirectional I/O lines are located on pins PA0–PA7, PD3–PD5, and PE0–
PE1, PE4, PE5, and PE7. The pinouts for headers J4 and J5 are shown in Figure 5.
Figure 5. RCM2200 I/O Pinouts
4.1.1 Dedicated Inputs
PB0 is a general CMOS input when the Rabbit 2000 is either not using Serial Port B or is
using Serial Port B in an asynchronous mode. Four other general CMOS input-only pins
are located on PB2–PB5. These pins can also be used for the slave port. PB2 and PB3 are
slave write and slave read strobes, while PB4 and PB5 serve as slave address lines SA0
and SA1, and are used to access the slave registers. PC1 and PC3 are general CMOS inputs
only. These pins can instead be selectively enabled to serve as the serial data inputs for
Serial Ports D and C.
4.1.2 Dedicated Outputs
One of the general CMOS output-only pins is located on PB7. PB7 can also be used with
the slave port as the /SLAVEATTN output. This configuration signifies that the slave is
requesting attention from the master. PC0 and PC2 are also output-only pins; PC0 and
PC2 can instead serve as the serial data outputs for Serial Ports D and C.
4.1.3 Memory I/O Interface
Four of the Rabbit 2000 address lines (A0–A3) and all the data lines (D0–D7) are available.
I/0 write (/IOWR) and I/0 read (/IORD) are also available for interfacing to external devices.
The ports on the Rabbit 2000 microprocessor used in the RCM2200 are configurable, and
so the factory defaults can be reconfigured. Table 1 lists the Rabbit 2000 factory defaults
and the alternate configurations.
Note: These pinouts are as seen on
the Bottom Side of the module.
VCC
PC1
PC3
TPOUT+
PD3
PD5
/IOWR
PE1
TPIN+
PE5
PE7
A2
A0
GND
PC0
PC2
TPOUT-
LNK
PD4
/IORD
PE0
TPIN-
PE4
ACT
A3
A1
J4
PA0
PA2
PA4
PA6
/RES
PB2
PB4
PB7
D6
D4
D2
D0
VCC
PA1
PA3
PA5
PA7
PB0
PB3
PB5
D7
D5
D3
D1
VBAT
GND
J5
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