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參數(shù)資料
| 型號： | 20315 |
| 英文描述： | Interfacing the AM29200 RISC Microcontroller to the MACE Am79C940 Ethernet Controller? 28.6KB (PDF) |
| 中文描述： | 接口的AM29200 RISC微控制器的MACE Am79C940的以太網(wǎng)控制器？ 28.6KB（PDF格式） |
| 文件頁數(shù)： | 3/16頁 |
| 文件大?。?/td> | 28K |
| 代理商： | 20315 |
AMD
Interfacing the Am29200 RISC Microcontroller to the MACE Am79C940 Controller
3
Read Cycle
Am29200
MEMCLK
A(23:0)
R/
W
PIACSx
ID(31:0)
S0
S1
S2
W0
W1
SCLK
ADD[4:0]
R/
W
CS
or
FDS
DBUS[15:0]
S3
Am79C940
Write Cycle
Am29200
MEMCLK
A(23:0)
R/
W
PIACSx
ID(31:0)
S0
S1
S2
W0
W1
SCLK
ADD[4:0]
R/
W
CS
or
FDS
DBUS[15:0]
S3
Am79C940
SOFTWARE
This article describes some details for configuring a
MACE and the basic philosophy for transmission and re-
ception of packets.
Initialization
The MACE will power-on with its registers set to the
default values. The initialization sequence will configure
the bus interface, set the FIFO and interrupt
configuration, set the ethernet interface configuration,
run diagnostics, and then configure for online operation.
Bus Interface (BIUCC)
The Byte Swap is set to big endian and the Transmit
Start Point is set to 112 bytes so that the transmit FIFO is
as full as possible before transmission commences.
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