參數(shù)資料
型號: 2032VE
廠商: Lattice Semiconductor Corporation
英文描述: 3.3V In-System Programmable High Density SuperFAST⑩ PLD
中文描述: 3.3在系統(tǒng)可編程高密度PLD的超快⑩
文件頁數(shù): 10/14頁
文件大?。?/td> 179K
代理商: 2032VE
Specifications
ispLSI 2032VE
10
Power Consumption
Power consumption in the ispLSI 2032VE device de-
pends on two primary factors: the speed at which the
device is operating and the number of product terms
used. Figure 3 shows the relationship between power
and operating speed.
Figure 3. Typical Device Power Consumption vs fmax
0127A/2032VE
ICC can be estimated for the ispLSI 2032VE using the following equation:
For ispLSI 2032VE-225: ICC(mA) = 4.5 + (# of PTs * 1.29) + (# of nets * Max freq * 0.0068)
For ispLSI 2032VE-180 and slower: ICC(mA) = 4.5 + (# of PTs * 1.05) + (# of nets * Max freq * 0.0068)
Where:
# of PTs = Number of product terms used in design
# of nets = Number of signals used in device
Max freq = Highest clock frequency to the device (in MHz)
The ICC estimate is based on typical conditions (VCC = 3.3V, room temperature) and an assumption of two
GLB loads on average exists. These values are for estimates only. Since the value of ICC is sensitive to
operating conditions and the program in the device, the actual ICC should be verified.
Notes: Configuration of two 16-bit counters
Typical current at 3.3V, 25
°
C
ispLSI 2032VE-225
ispLSI 2032VE-180
and slower
75
125
0
25
50
75
100
f
max (MHz)
125
150
175
200
225
I
C
150
100
25
50
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