參數(shù)資料
型號: 2096VE
廠商: Lattice Semiconductor Corporation
英文描述: 3.3V In-System Programmable SuperFAST⑩ High Density PLD
中文描述: 3.3在系統(tǒng)可編程超快⑩高密度可編程邏輯器件
文件頁數(shù): 9/12頁
文件大?。?/td> 160K
代理商: 2096VE
Specifications
ispLSI 2096VE
9
Power Consumption
Power consumption in the ispLSI 2096VE device de-
pends on two primary factors: the speed at which the
device is operating and the number of Product Terms
used. Figure 3 shows the relationship between power
and operating speed.
Figure 3. Typical Device Power Consumption vs fmax
0127/2096VE
ICC can be estimated for the ispLSI 2096VE using the following equation:
ICC (mA) = 8.0 + (# of PTs * 0.63) + (# of Nets * Max Freq * 0.005)
Where:
# of PTs = Number of Product Terms used in design
# of nets = Number of Signals used in device
Max freq = Highest Clock Frequency to the device (in MHz)
The ICC estimate is based on typical conditions (VCC = 3.3V, room temperature) and an assumption of two
GLB loads on average exists. These values are for estimates only. Since the value of ICC is sensitive to
operating conditions and the program in the device, the actual ICC should be verified.
140
120
180
0
50
100
150
200
f
max (MHz)
I
C
Notes: Configuration of six 16-bit counters
Typical current at 3.3V, 25
°
C
ispLSI 2096VE
200
220
240
160
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