參數(shù)資料
型號(hào)： 22495
英文描述： Implementation of Write Allocate Application Note Mobile AMD-K6 Processor Power Supply Design Application Note
中文描述： 在寫分配執(zhí)行情況的說(shuō)明移動(dòng)應(yīng)用的AMD - K6處理器電源設(shè)計(jì)應(yīng)用指南
文件頁(yè)數(shù)： 22/50頁(yè)
文件大?。?/td> 1087K
代理商： 22495
12
Decoupling and Layout Recommendations
Mobile AMD-K6
Processor Power Supply Design
22495C/0—May 1999
Current Transient
Response
In the power distribution model shown in Figure 6, C
B
represents bulk capacitors for the power supply and C
F
represents high-frequency capacitors for processor decoupling.
The bulk capacitors supply current to the processor during
sudden excessive current demands that cannot be supplied by
the voltage regulator (for example, transistioning from the Stop
Grant state to normal mode). The required C
B
can be calculated
by the following equation (ideal case):
Where:
I is the maximum processor current transient
V is the tolerance times the nominal processor voltage
t is the voltage regulator response time
I
I
I
Example 1
Assuming the maximum processor current transient is 6A, the
voltage tolerance of the processor is 100 mV, and the voltage
regulator response time is 10
μ
s, the minimum capacitance for
the bulk decoupling is:
C
B
≥
(6A/0.100V)
10
μ
s = 600
μ
F
ESR (equivalent series resistance) and ESL (equivalent series
inductance) are introduced in the model shown in Figure 6. C
B
contains ESR and ESL, which cause voltage drop during current
transient activity (See Figure 7). The resistive and inductive
effect of the capacitors must be taken into account when
designing processor decoupling. Low ESL and ESR capacitors
should be used to obtain better voltage and current output
characteristics. The voltage error budget for ESL is shown in
Table 1 on page 15. Taking into account the ESR, the following
equation is used to calculate C
B
:
C
≥
I
V
t
C
≥
I
(
V – (
I
ESR))
t
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