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參數(shù)資料
| 型號： | 22495 |
| 英文描述： | Implementation of Write Allocate Application Note Mobile AMD-K6 Processor Power Supply Design Application Note |
| 中文描述： | 在寫分配執(zhí)行情況的說明移動(dòng)應(yīng)用的AMD - K6處理器電源設(shè)計(jì)應(yīng)用指南 |
| 文件頁數(shù)： | 24/50頁 |
| 文件大?。?/td> | 1087K |
| 代理商： | 22495 |
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14
Decoupling and Layout Recommendations
Mobile AMD-K6
Processor Power Supply Design
22495C/0—May 1999
Example 3
This example assumes the maximum processor current
transient is 8.5A, the voltage tolerance of the processor is less
than 100mV, and the voltage regulator response time is 10
μ
s.
Assuming seven tantalum capacitors with 55-m
ESR (the
parallel resistance is 8m
) are used as bulk capacitors, the
minimum bulk capacitance is:
C
O
≥
((8.5A/(0.100
V – [8.5A
8
m
]
))
10
μ
s = 2656
μ
F
In order to achieve more margin, the total error budget should
be distributed between set point tolerance, ESL, and ESR as
shown in Figure 7 and Table 1 on page 15. Although the drop
from ESL is a small factor, it is not negligible. If aluminum
electrolytic capacitors are used instead of tantalum capacitors,
the ESL drop is larger.
Note:
For additional higher current calculations, see the
AMD-K6
Power Supply Design Application Note, order#
21103.
The high-frequency decoupling capacitors (C
F
), which are
typically smaller in capacitance and ESL, maintain the voltage
output during average load change until C
B
can react. See
“High-Frequency Decoupling” on page 25 for more
information.
Figure 7. Load Current Step versus Output Voltage Response
(Max)
I
CC
Load
Current
Output
Voltage
Response
V
CC
Voltage Regulator Response
(Min)
(Max)
(Min)
ESR
x
I
ESL
x
I
t
I
C
V
t
=
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