參數(shù)資料
型號: 240VA
廠商: Lattice Semiconductor Corporation
英文描述: In-System Programmable 3.3V Generic Digital CrosspointTM
中文描述: 在系統(tǒng)可編程3.3V的通用數(shù)字CrosspointTM
文件頁數(shù): 12/25頁
文件大小: 324K
代理商: 240VA
12
Specifications
ispGDX240VA
ADVANCED
External Timing Parameters (Continued)
1.0
0.0
0 4 10
20
30
40
50
60
70
0.2
0.4
0.6
0.8
1.2
1.4
1.6
I/O Cell Fanout
ispGDX240VA Maximum
GRP Delay vs. I/O Cell Fanout
ispGDX240VA timings are specified with a GRP load
(fanout) of four I/O cells. The figure below shows the
GRP Delay with increased GRP loads. These deltas
apply to any signal path traversing the GRP (MUXA-D,
OE, CLK/CLKEN, MUXsel0-1). Global Clock signals
which do not use the GRP have no fanout delay adder.
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