參數資料
型號： 25C128
廠商： Microchip Technology Inc.
英文描述： 128K 5.0V SPI Bus Serial EEPROM(4.5~5.5V,128K位,SPI總線串行EEPROM)
中文描述： 128K的5.0V SPI總線串行EEPROM（4.5?5.5V的，128K的位和SPI總線串行EEPROM的）
文件頁數： 48/170頁
文件大小： 4191K
代理商： 25C128
PIC16F62X
DS40300C-page 46
Preliminary
2003 Microchip Technology Inc.
7.0
TIMER1 MODULE
The Timer1 module is a 16-bit timer/counter consisting
of two 8-bit registers (TMR1H and TMR1L) which are
readable and writable. The TMR1 Register pair
(TMR1H:TMR1L) increments from 0000h to FFFFh
and rolls over to 0000h. The TMR1 Interrupt, if enabled,
is generated on overflow which is latched in interrupt
flag bit TMR1IF (PIR1<0>). This interrupt can be
enabled/disabled by setting/clearing TMR1 interrupt
enable bit TMR1IE (PIE1<0>).
Timer1 can operate in one of two modes:
As a timer
As a counter
The Operating mode is determined by the clock select
bit, TMR1CS (T1CON<1>).
In Timer mode, Timer1 increments every instruction
cycle. In Counter mode, it increments on every rising
edge of the external clock input.
Timer1 can be enabled/disabled by setting/clearing
control bit TMR1ON (T1CON<0>).
Timer1 also has an internal “RESET input”. This
RESET can be generated by the CCP module
(Section 11.0). Register 7-1 shows the Timer1 Control
register.
For the PIC16F627 and PIC16F628, when the Timer1
oscillator is enabled (T1OSCEN is set), the RB7/T1OSI
and RB6/T1OSO/T1CKI pins become inputs. That is,
the TRISB<7:6> value is ignored.
REGISTER 7-1:
T1CON: TIMER1 CONTROL REGISTER (ADDRESS: 10h)
U-0
U-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
—
—
T1CKPS1 T1CKPS0
T1OSCEN
T1SYNC TMR1CS TMR1ON
bit 7
bit 0
bit 7-6
Unimplemented:
Read as '0'
bit 5-4
T1CKPS1:T1CKPS0
: Timer1 Input Clock Prescale Select bits
11
= 1:8 Prescale value
10
= 1:4 Prescale value
01
= 1:2 Prescale value
00
= 1:1 Prescale value
bit 3
T1OSCEN
: Timer1 Oscillator Enable Control bit
1
= Oscillator is enabled
0
= Oscillator is shut off
(1)
bit 2
T1SYNC
: Timer1 External Clock Input Synchronization Control bit
TMR1CS =
1
1
= Do not synchronize external clock input
0
= Synchronize external clock input
TMR1CS =
0
This bit is ignored. Timer1 uses the internal clock when TMR1CS =
0
.
bit 1
TMR1CS
: Timer1 Clock Source Select bit
1
= External clock from pin RB6/T1OSO/T1CKI (on the rising edge)
0
= Internal clock (F
OSC
/4)
bit 0
TMR1ON
: Timer1 On bit
1
= Disables Timer1
0
= Stops Timer1
Note 1:
The oscillator inverter and feedback resistor are turned off to eliminate power drain.
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
’1’ = Bit is set
’0’ = Bit is cleared
x = Bit is unknown
相關PDF資料
PDF描述
25LC128 128K 5.0V SPI Bus Serial EEPROM(2.5~5.5V,128K位,SPI總線串行EEPROM)
25C256 256K 5.0V SPI Bus Serial EEPROM(4.5~5.5V,256K位,SPI總線串行EEPROM)
25C160 8K/16K 5.0V SPI Bus Serial EEPROM
25C080 8K 5.0V SPI Bus Serial EEPROM(4.5~5.5V,3MHz,8K位,10M次可自定時擦寫周期,EEPROM)
25C320 32K 5.0V SPI Bus Serial EEPROM
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