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參數(shù)資料
| 型號： | 27N120BN |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | 72A, 1200V, NPT Series N-Channel IGBT |
| 中文描述： | 第72A，1200伏，不擴散核武器條約系列N溝道IGBT的 |
| 文件頁數(shù)： | 7/8頁 |
| 文件大小： | 153K |
| 代理商： | 27N120BN |
200
4
Fairchild Semiconductor Corporation
HGTG27N120BN / HGT5A27N12BN Rev. C
2
HGTG27N120BN / HGT5A27N120BN
Handling Precautions for IGBTs
Insulated Gate Bipolar Transistors are susceptible to
gate-insulation damage by the electrostatic discharge of
energy through the devices. When handling these devices,
care should be exercised to assure that the static charge
built in the handler
’
s body capacitance is not discharged
through the device. With proper handling and application
procedures, however, IGBTs are currently being extensively
used in production by numerous equipment manufacturers in
military, industrial and consumer applications, with virtually
no damage problems due to electrostatic discharge. IGBTs
can be handled safely if the following basic precautions are
taken:
1. Prior to assembly into a circuit, all leads should be kept
shorted together either by the use of metal shorting
springs or by the insertion into conductive material such
as
“
ECCOSORBD
LD26
”
or equivalent.
2. When devices are removed by hand from their carriers,
the hand being used should be grounded by any suitable
means - for example, with a metallic wristband.
3. Tips of soldering irons should be grounded.
4. Devices should never be inserted into or removed from
circuits with power on.
5.
Gate Voltage Rating
- Never exceed the gate-voltage
rating of V
GEM
. Exceeding the rated V
GE
can result in
permanent damage to the oxide layer in the gate region.
6.
Gate Termination
- The gates of these devices are
essentially capacitors. Circuits that leave the gate
open-circuited or floating should be avoided. These
conditions can result in turn-on of the device due to
voltage buildup on the input capacitor due to leakage
currents or pickup.
7.
Gate Protection
- These devices do not have an internal
monolithic Zener diode from gate to emitter. If gate
protection is required an external Zener is recommended.
Operating Frequency Information
Operating frequency information for a typical device
(Figure 3) is presented as a guide for estimating device
performance for a specific application. Other typical
frequency vs collector current (I
CE
) plots are possible using
the information shown for a typical unit in Figures 5, 6, 7, 8, 9
and 11. The operating frequency plot (Figure 3) of a typical
device shows f
MAX1
or f
MAX2
; whichever is smaller at each
point. The information is based on measurements of a
typical device and is bounded by the maximum rated
junction temperature.
f
MAX1
is defined by f
MAX1
= 0.05/(t
d(OFF)I
+ t
d(ON)I
).
Deadtime (the denominator) has been arbitrarily held to 10%
of the on-state time for a 50% duty factor. Other definitions
are possible. t
d(OFF)I
and t
d(ON)I
are defined in Figure 19.
Device turn-off delay can establish an additional frequency
limiting condition for an application other than T
JM
. t
d(OFF)I
is important when controlling output ripple under a lightly
loaded condition.
f
MAX2
is defined by f
MAX2
= (P
D
- P
C
)/(E
OFF
+ E
ON2
). The
allowable dissipation (P
D
) is defined by P
D
= (T
JM
- T
C
)/R
θ
JC
.
The sum of device switching and conduction losses must
not exceed P
D
. A 50% duty factor was used (Figure 3) and
the conduction losses (P
C
) are approximated by
P
C
= (V
CE
x I
CE
)/2.
E
ON2
and E
OFF
are defined in the switching waveforms
shown in Figure 19. E
ON2
is the integral of the
instantaneous power loss (I
CE
x V
CE
) during turn-on and
E
OFF
is the integral of the instantaneous power loss
(I
CE
x V
CE
) during turn-off. All tail losses are included in
the calculation for E
OFF
; i.e., the collector current equals
zero (I
CE
= 0).
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