
RS8234
7.0 OAM Functions
ATM ServiceSAR Plus with xBR Traffic Management
7.2 Segmentation of OAM Cells
N8234DSC
PRELIMINARY
7-5
7.2 Segmentation of OAM Cells
The host (or local processor) places OAM cells in a single buffer, and thus
allocates a single segmentation buffer descriptor (SBD) for the OAM cell data
buffer, not a linked list of SBDs.
The host (or local processor) then writes a pointer to that SBD in the next
available transmit queue entry, and sets the VLD bit to one.
When the segmentation coprocessor processes that transmit queue entry, it
submits the OAM cell data buffer to the xBR Traffic Manager and the cell thus is
scheduled for transmission.
7.2.1 Key OAM-Related Fields for OAM Segmentation
7.2.1.1 Segmentation
Buffer Descriptors
Several fields in the SBD entry are used to facilitate segmentation of OAM cells.
Set the 2-bit AAL_OPT field to SINGLE (value = 01). This enables read-
ing 48 octets from a single buffer to form a single ATM cell.
Set the OAM_STAT bit to a logic high. The RS8234 will now report status
to the OAM-dedicated OAM_STAT_ID identified in the SEG_CTRL reg-
ister, instead of the STAT specified in the Seg VCC Table entry.
Set the single-bit HEADER_MOD field to a logic one. This activates the
WR_PTI and WR_VCI bits in the buffer descriptor, which signal the
RS8234 to overwrite the ATM header PTI and VCI fields for that cell with
the values from the PTI_DATA and VCI_DATA fields. In this way, F4 and
F5 flow OAM cells can be generated by the RS8234.
The VCI_DATA field set to a value of three (segment cell) or four
(end-to-end cell) generates an F4 flow OAM cell.
The PTI_DATA field set to a value of 100 (segment cell) or 101
(end-to-end cell) generates an F5 flow OAM cell.
Set the AAL_MODE field to 01 (AAL0).
Set both BOM and EOM bits to zero.
Set the CRC10 bit to a logic high.
7.2.1.2 Low Latency
Transmission
For low latency, the LINK_HEAD bit in the transmit queue entry should be set to
a logic high. This tells the RS8234 to link the buffer chain at the head of the
existing chain for the corresponding VCC. This bit is intended for use with the
Seg buffer descriptor’s SINGLE option, to send in-line OAM cells. Only a single
Seg buffer descriptor may be linked to a transmit queue entry when this bit is set.
This bit must also be set if the OAM SBD is placed on the transmit queue after
a partial PDU, to ensure correct segmentation.
7.2.1.3 Segmentation
Status Queue
The SINGLE bit in the Seg status queue entry should be set to a logic high. This
bit is set if the SINGLE option in the AAL_OPT field of the Seg buffer descriptor
is set. This bit indicates a special buffer is in use, rather than the normal
system-assigned buffers for normal CPCS-PDUs.
7.2.1.4 F4 Flow
For F4 flow operation, a separate VCC Table entry must be configured.