參數(shù)資料
型號： 28F008C3
廠商： Intel Corp.
英文描述： 3 VOLT ADVANCED+ BOOT BLOCK 8-, 16-, 32-MBIT FLASH MEMORY FAMILY
中文描述： 3伏高級啟動塊8 - ，16 - ，32 - Mbit閃存家庭
文件頁數(shù)： 19/49頁
文件大?。?/td> 408K
代理商： 28F008C3
E
3.2.5
SMART 3 ADVANCED BOOT BLOCK
–BYTE-WIDE
19
PRELIMINARY
ERASE MODE
To erase a block, write the Erase Set-up and Erase
Confirm commands to the CUI, along with an
address identifying the block to be erased. This
address is latched internally when the Erase
Confirm command is issued. Block erasure results
in all bits within the block being set to
“1.” Only one
block can be erased at a time.
The WSM will execute the following sequence of
internally timed events to:
1.
2.
Program all bits within the block to “0.”
Verify that all bits within the block are
sufficiently programmed to “0.”
Erase all bits within the block to “1.”
Verify that all bits within the block are
sufficiently erased.
3.
4.
While the erase sequence is executing, bit 7 of the
status register is a “0.”
When the status register indicates that erasure is
complete, check the Erase Status bit to verify that
the erase operation was successful. If the Erase
operation was unsuccessful, SR.5 of the status
register will be set to a “1,” indicating an erase
error. If V
was not within acceptable limits after
the Erase Confirm command was issued, the WSM
will not execute the erase sequence; instead, SR.5
of the status register is set to indicate an erase
error, and SR.3 is set to a “1” to identify that V
PP
supply voltage was not within acceptable limits.
After an erase operation, clear the Status Register
(50H) before attempting the next operation. Any
CUI instruction can follow after erasure is
completed; however, to prevent inadvertent status
register reads, it is advisable to reset the flash to
read array after the erase is complete.
3.2.5.1
Suspending and Resuming Erase
Since an erase operation requires on the order of
seconds to complete, an Erase Suspend command
is provided to allow erase-sequence interruption in
order to read data from or program data to another
block in memory. Once the erase sequence is
started, writing the Erase Suspend command to the
CUI requests that the WSM pause the erase
sequence at a predetermined point in the erase
algorithm. The status register will indicate if/when
the erase operation has been suspended.
A Read Array/Program command can now be
written to the CUI in order to read/write data from/to
blocks other than that which is suspended. The
Program
command
can
suspended to read yet another array location. The
only valid commands while erase is suspended are
Erase Resume, Program, Program Resume, Read
Array, or Read Status Register.
subsequently
be
During erase suspend mode, the chip can be
placed in a pseudo-standby mode by taking CE# to
V
IH
. This reduces active current consumption.
Erase Resume continues the erase sequence when
CE# = V
IL
. As with the end of a standard erase
operation, the status register must be read and
cleared before the next instruction is issued.
3.2.5.2
V
PP
Supply Voltage during Erase
V
PP
supply voltage considerations are outlined in
Section 3.4.
相關(guān)PDF資料
PDF描述
28F008SA 8-MBIT (1-MBIT x 8) FlashFileTM MEMORY
28F008SA-L 8-MBIT (1 MBIT x 8) FLASHFILETM MEMORY
28F008S3 3 V FlashFile Memory(3V閃速存儲器)
28F016S3 3 V FlashFile Memory(3V閃速存儲器)
28F008S5 8-MBIT 5 VOLT FlashFile Memory(8M位5V閃速存儲器)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
28F008S3 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Byte-Wide Smart 3 Flashfile Memory Family 4 8 and
28F008S5 制造商:未知廠家 制造商全稱:未知廠家 功能描述:BYTE-WIDE SMART 5 FlashFile MEMORY FAMILY 4. 8. AND 16 MBIT
28F008SA 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:8 MBIT (1 MBIT x 8) FLASH MEMORY
28F008SA-L 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:8 MBIT (1 MBIT x 8) FLASH MEMORY
28F008SAT-ZW 制造商: 功能描述: 制造商:undefined 功能描述:
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