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Chapter 1 Architectural Overview
Data can be transferred in both directions, either via software controlled 8–bit or
32–bit data words, or via DMA unit control. Once again the associated control regis-
ters give the programmer flexibility in specifying the timing requirements for con-
necting the parallel port directly to the host processor.
1.8.8 Serial Port
The on–chip serial port supports high speed full duplex, bi–directional data
transfer using the RS–232 protocol. The serial port can be used in an polled or inter-
rupted driven mode. Alternatively, it may request DMA access. The lightweight in-
terrupt structure of the Am29000 processor core, coupled with the smart on–chip pe-
ripherals, presents the software engineer with a wide range of options for controlling
the serial port.
1.8.9 I/O Video Interface
The video interface provides direct connection to a number of laser–beam
marking engines. It may also be used to receive data from a raster input device such as
a scanner or to serialize/deserialize a data stream. It is possible with external circuitry
support that a noninterleaved composite TV video signal could be generated.
The video shift register clock must be supplied on an asynchronous input pin,
which may be tied to the processor clock. (Note, a video image is built by serially
clocking the data in the shift register out to the imaging hardware. When the shift reg-
ister is empty it must be quickly refilled before the next shift clock occurs.) The
imaged page may be synchronized to an external page–sync signal. Horizontal and
vertical image margins as well as image scan rates are all programmable via the now
familiar on–chip control register method.
The video shift registers are duplicated, much like some of the DMA control
registers. This reduces the need for rapid software response to maintain video shift
register update. When building an image, the shift register is updated from the dupli-
cate support register. Software, possibly activated via a video–register–empty inter-
rupt, must fill the duplicate shift register before it becomes used–up. Alternatively,
the video data register can be maintained by the DMA controller without the need for
frequent CPU intervention.
1.8.10 The SA29200 Evaluation Board
The SA29200 is an inexpensive software development board utilizing the
Am29200 microcontroller. Only a 5v supply and a serial cable connection to a host
computer are required to enable board operation. Included on the board is an 8–bit
wide EPROM (128Kx8) which contains the MiniMON29K debug monitor and the
OS–boot operating system. There is also 1M byte of 32–bit DRAM (256Kx32) into
which programs can be loaded via the on–chip UART. The processor clock rate is 16