參數(shù)資料
型號(hào)： 5962-0050401QYC
廠商： E2V TECHNOLOGIES PLC
元件分類： ADC
英文描述： 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, QFP68
封裝： QFP-68
文件頁(yè)數(shù)： 38/57頁(yè)
文件大?。?/td> 1276K
代理商： 5962-0050401QYC
Rev.2.10
Oct 25, 2006
Page 43 of 326
REJ03B0152-0210
M306H7MG-XXXFP/MC-XXXFP/FGFP
6. INTERRUPTS
6.
Interrupts
6.1
Type of Interrupts
Figure 6.1 shows types of interrupts.
Figure 6.1
Interrupts
Maskable Interrupt: An interrupt which can be enabled (disabled) by the interrupt enable flag (I flag) or whose
interrupt priority can be changed by priority level.
Non-maskable Interrupt: An interrupt which cannot be enabled (disabled) by the interrupt enable flag (I flag) or
whose interrupt priority cannot be changed by priority level.
Interrupt
Software
(Non-maskable interrupt)
Hardware
Special
(Non-maskable interrupt)
Peripheral function (Note 1)
(Maskable interrupt)
Undefined instruction (UND instruction)
Overflow (INTO instruction)
BRK instruction
INT instruction
_______
NMI
________
DBC (Note 2)
Watchdog timer
Single step (Note 2)
Address match
Note 1: Peripheral function interrupts are generated by the microcomputer's internal functions.
Note 2: Do not normally use this interrupt because it is provided exclusively for use by development
support tools.
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