參數(shù)資料
型號(hào): 5962-0050401QYC
廠商: ATMEL CORP
元件分類: ADC
英文描述: 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP68
封裝: CERAMIC, QFP-68
文件頁數(shù): 55/57頁
文件大?。?/td> 1276K
代理商: 5962-0050401QYC
7
TS8388B
2144C–BDC–04/03
Gain error drift
Offset error drift
4
100
40
125
50
150
60
ppm/
°C
ppm/
°C
DC Accuracy (CQFP68 package)
Single-ended or differential input mode, 50% clock duty cycle (CLK, CLKB), Binary output data format
Tj (typical) = 70
°C.
Differential non linearity
DNL-
1, 2
6
-0.5
-0.6
-0.25
-0.35
lsb
Differential non linearity
DNL+
1, 2
6
0.3
0.4
0.6
0.7
lsb
Integral non linearity
INL-
1, 2
6
-1.0
-1.2
0.7
0.9
lsb
Integral non linearity
INL+
1, 2
6
0.7
0.9
1.0
1.2
lsb
No missing code
Guaranteed over specified temperature range
Gain error
1, 2
6
-10
-11
-2
10
11
% FS
% F
S
Input offset voltage
1, 2
6
-26
-30
-5
26
30
mV
Gain error drift
Offset error drift
4
100
40
125
50
150
60
ppm/
°C
ppm/
°C
Transient Performance
Bit Error Rate
FS = 1 GSPS FIN = 62.5 MHz
BER
4
1E-12
Error/
sample
ADC settling time
VIN -VINB = 400 mVpp
TS
4
0.5
1
ns
Overvoltage recovery time
TOR
4
0.5
1
ns
AC Performance
Single-ended or differential input and clock mode, 50% clock duty cycle (CLK, CLKB), Binary output data format,
Tj = 70
°C, unless otherwise specified.
Signal to Noise and Distortion ratio
SINAD
–––
F
S = 1 GSPS, FIN = 20 MHz
4
42
44
dB
FS = 1 GSPS, FIN = 500 MHz
4
41
43
dB
F
S = 1 GSPS, FIN = 1000 MHz (-1 dBFs)
4
38
40
dB
F
S = 50 MSPS, FIN = 25 MHz
1, 2, 6
40
44
dB
Table 3. Electrical Specifications (Continued)
Parameter
Symbol
Test
Level
Value
Unit
Note
Min
Typ
Max
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