參數(shù)資料
型號(hào): 5962-0051901NXD
廠商: TEXAS INSTRUMENTS INC
元件分類(lèi): ADC
英文描述: 2-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO32
封裝: PLASTIC, TSSOP-32
文件頁(yè)數(shù): 17/42頁(yè)
文件大小: 840K
代理商: 5962-0051901NXD
THS12082
12-BIT, 8 MSPS, SIMULTANEOUS SAMPLING ANALOG-TO-DIGITAL CONVERTERS
SLAS271B – MAY 2000 – REVISED DECEMBER 2002
24
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
timing and signal description of the THS12082 (continued)
read timing (using RD, RD-controlled)
Figure 13 shows the read-timing behavior when the WR(R/W) input is programmed as a write-input only. The
input RD acts as the read-input in this configuration. This timing is called RD-controlled because RD is the last
external signal of CS0, CS1, and RD that becomes valid.
90%
10%
tw(RD)
tsu(CS)
th(CS)
ta
th
td(CSDAV)
CS0
CS1
WR
RD
D(0–11)
DATA_AV
10%
Figure 13. Read Timing Diagram Using RD (RD-controlled)
read timing parameter (RD-controlled)
PARAMETER
MIN
TYP
MAX
UNIT
tsu(CS)
Setup time, RD low to last CS valid
0
ns
ta
Access time, last CS valid to data valid
0
10
ns
td(CSDAV) Delay time, last CS valid to DATA_AV inactive
12
ns
th
Hold time, first CS invalid to data invalid
0
5
ns
th(CS)
Hold time, RD change to first CS invalid
5
ns
tw(RD)
Pulse duration, RD active
10
ns
相關(guān)PDF資料
PDF描述
THS12082IDA 2-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO32
THS12082IDAR 2-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO32
THS12082CDARG4 2-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO32
THS12082IDAG4 2-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO32
THS12082CDAR 2-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO32
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
5962-0052201HXA 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:DC to DC Converter
5962-0052201HXC 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:DC to DC Converter
5962-0052201HYA 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:DC to DC Converter
5962-0052201HYC 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:DC to DC Converter
5962-0052201HZA 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:DC to DC Converter