參數(shù)資料
型號(hào)： 73S1215F-EB-LITE
廠商： Maxim Integrated Products
文件頁數(shù)： 86/136頁
文件大小： 0K
描述： BOARD EVAL 73S1215F CBL/DOC/CD
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 1
系列： *
DS_1215F_003
73S1215F Data Sheet
Rev. 1.4
53
A 32-bit RTC counter is clocked by a selectable clock (1/2, 1, 2 second) to measure time. A trimming
function is provided such that a trim value is accumulated in a 24-bit accumulator at the same rate as the
RTC counter. The trim value is sign magnitude number. When the accumulator reaches overflow, it will
advance the counter one additional count if the trim value is positive, or prevent the counter from
advancing one count if the trim value is negative. This mechanism allows the RTC counter to be adjusted
to keep accurate time with a minimum 0.5 second resolution. When using the high speed oscillator, the
RTC counter wants to have an extra count added every 9375 seconds to keep the RTC counter at the
proper time. If the one second RTC counter rate is used, the RTC Trim value should be set to 0x6FD
(1789 decimal). This value is derived by taking the resolution of the 24 bit accumulator (2 ^ 24 =
16777216) and dividing this by 9375. This means the RTC accumulator will overflow every 9375 seconds
and will cause the RTC counter to advance by 2 when the accumulator overflow occurs, thus bringing the
RTC count to the proper time.
In addition to the basic software watchdog timer included in the 80515 MPU, an independent, robust,
fixed-duration, hardware watchdog timer (WDT) is included with the 73S1215F RTC. The Watch Dog
timer will give the MPU second to respond to the RTC Interrupt. If the processor does not perform an
RTC Interrupt service, a full RESET will be performed. The RTC interrupt is connected to the core
interrupt “external interrupt 5” signal. The RTC interrupt must be enabled to obtain the watchdog timer
function. Note: if the power down mode doesn’t want the watchdog to wake up the MPU, the RTC
interrupt should be masked before entering the power down mode.
Real Time Clock Control Register (RTCCtl) : 0x FFB0
0x00
Table 55: The RTCCtl Register
MSB
LSB
–
RTCLD CTSEL.1 CTSEL.0 RINT.2
RINT.1
RINT.0
Bit
Symbol
Function
RTCCtl.7
–
RTCCtl.6
–
RTCCtl.5
RTCLD
When set, RTC parameters (RTC Count, RTC Accumulator, and RTC
Trim) are loaded at the next 32kHz clock positive edge.
RTCCtl.4
CTSEL.1
Selects the time value that is counted by the real time clock:
0x – 1 second (default)
10 – second
11 – 2 seconds
RTCCtl.3
CTSEL.0
RTCCtl.2
RINT.2
RTC interrupt internal selection bits: (listed as bits 2,1,0)
100 – 0.5 second
0xx – 1 second (default)
101 – 2 seconds
110 – 4 seconds
111 – 8 seconds
RTCCtl.1
RINT.1
RTCCtl.0
RINT.0
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