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參數(shù)資料
| 型號： | 80960RN |
| 廠商： | Intel Corp. |
| 英文描述： | 80960RN I/O Processor(80960RN I/O 處理器) |
| 中文描述： | 80960RN I / O處理器（80960RN的I / O處理器） |
| 文件頁數(shù)： | 18/54頁 |
| 文件大?。?/td> | 851K |
| 代理商： | 80960RN |
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80960RN
—
Data Sheet
18
Advance Information
RAD[16:9]
8
I/O
5V
Irst(X)
Sync(D)
FLASH ADDRESS/DATA BUS
: During an address (
T
) cycle, bits
16:9 contain a physical word address. During a data cycle (Td), bits
16:9 carry data bits 16:9 of the Flash data byte.
RAD[8]
1
O
Prst(H)
FLASH ADDRESS BUS
: During an address (
T
) cycle, bit 8
contain a physical word address.
RAD[8]
. multiplexes physical
address bits [22] with [8]. Refer to the MCU chapter of the
i960
RM/RN I/O Processor Developer
’
s Manual
for details.
RAD[7]
1
O
Prst(H)
FLASH ADDRESS BUS
: During an address (
T
) cycle, bit 7
contain a physical word address.
RAD[7]
. multiplexes physical
address bits [21] with [7]. Refer to the MCU chapter of the
i960
RM/RN I/O Processor Developer
’
s Manual
for details.
RAD[6]
/
RST_MODE#
(Config. Pin)
1
I/O
5V
Prst(H)
FLASH ADDRESS BUS
: During an address (
T
) cycle, bit 6
contain a physical word address.
RAD[6]
. multiplexes physical
address bits [20] with [6]. Within four clocks after the deassertion of
P_RST#
, this pin is an output only. Refer to the MCU chapter of the
i960
RM/RN I/O Processor Developer
’
s Manual
for details.
RESET MODE
is sampled at Primary PCI bus reset to determine if
the 80960RN processor is to be held in reset. If asserted, the
80960RN processor will be held in reset until the 80960 Processor
Reset bit is cleared in the Extended Bridge Control Register.
RAD[5]
1
O
Prst(H)
FLASH ADDRESS BUS
: During an address (
T
) cycle, bit 5
contain a physical word address.
RAD[5]
. multiplexes physical
address bits [19] with [5]. Within four clocks after the deassertion of
P_RST#
, this pin is an output only. Refer to the MCU chapter of the
i960
RM/RN I/O Processor Developer
’
s Manual
for details.
RAD[4]
/
STEST
(Config. Pin)
1
I/O
5V
Prst(H)
FLASH ADDRESS BUS
: During an address (
T
) cycle, bit 4
contain a physical word address.
RAD[4]
. multiplexes physical
address bits [18] with [4]. Within four clocks after the deassertion of
P_RST#
, this pin is an output only. Refer to the MCU chapter of the
i960
RM/RN I/O Processor Developer
’
s Manual
for details.
SELF TEST
enables or disables the processor
’
s internal self-test
feature at initialization.
STEST
is examined at the end of
P_RST#
.
When
STEST
is asserted, the processor performs its internal
self-test and the external bus confidence test. When
STEST
is
deasserted, the processor performs only the external bus
confidence test.
0 = Self Test Disabled
1 = Self Test Enabled
RAD[3]
/
RETRY
(Config. Pin)
1
I/O
5V
Prst(H)
FLASH ADDRESS BUS
: During an address (
T
) cycle, bit 3
contain a physical word address.
RAD[3]
. multiplexes physical
address bits [17] with [3]. Within four clocks after the deassertion of
P_RST#
, this pin is an output only. Refer to the MCU chapter of the
i960
RM/RN I/O Processor Developer
’
s Manual
for details.
RETRY
is sampled at Primary PCI bus reset to determine if the
Primary PCI interface will be disabled. If high, the Primary PCI
interface will disable PCI configuration cycles by signaling a Retry
until the Configuration Cycle Retry bit is cleared in the Extended
Bridge Control Register. If low, the Primary PCI interface allow
configuration cycles to occur.
Table 4.
Memory Controller Signals (Sheet 2 of 3)
NAME
COUNT
TYPE
DESCRIPTION
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 80960SA | Embedded 32-Bit Microprocessor With 16-Bit Burst Data Bus(帶有16位脈沖串?dāng)?shù)據(jù)總線的嵌入式 32-BIT微處理器) |
| 80960SB | Embedded 32-Bit Microprocessor With 16-Bit Burst Data Bus(帶有16位脈沖串?dāng)?shù)據(jù)總線的嵌入式 32-BIT微處理器) |
| 8097JF | COMMERCIAL/EXPRESS HMOS MICROCONTOLLER |
| 8098 | COMMERCIAL/EXPRESS HMOS MICROCONTROLLER |
| 8098 | T-1 Subminiature Lamps |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 80960SA | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS |
| 80960SB | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS |
| 80961-01 | 制造商:Glenair 功能描述:EARTH BOND M10 FOR AL 4MM T |
| 809621-000 | 制造商:TE Connectivity 功能描述:809621-000 |
| 80963 | 制造商:3M Electronic Products Division 功能描述:Tape Temflex 1500 Brown 15mmx10m |
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