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參數(shù)資料
| 型號： | 82801E |
| 廠商： | INTEL CORP |
| 元件分類： | 外設(shè)及接口 |
| 英文描述： | Intel 82801E Communications I/O Controller Hub (C-ICH) |
| 中文描述： | MULTIFUNCTION PERIPHERAL, PBGA421 |
| 封裝： | BGA-421 |
| 文件頁數(shù)： | 31/84頁 |
| 文件大?。?/td> | 1196K |
| 代理商： | 82801E |
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Intel
82801E C-ICH
Advance Information Datasheet
31
PIRQ[E:F]#
PIRQ[G]#/GPIO[4]
PIRQ[H]#/GPIO[5]
I/OD
PCI Interrupt Requests:
In Non-APIC Mode the PIRQx# signals can be
routed to interrupts 3:7, 9:12, 14 or 15 as described in the Interrupt Steering
section. Each PIRQx# line has a separate Route Control Register.
In APIC mode, these signals are connected to the internal I/O APIC in the
following fashion: PIRQ[E]# is connected to IRQ20, PIRQ[F]# to IRQ21,
PIRQ[G]# to IRQ22, and PIRQ[H]# to IRQ23. If not needed for interrupts,
these signals can be used as GPIO.
PLOCK#
I/O
PCI Lock:
PLOCK# indicates an exclusive bus operation and may require
multiple transactions to complete. 82801E C-ICH asserts PLOCK# when it
performs non-exclusive transactions on the PCI bus.
PWROK
I
Power OK:
When asserted, PWROK is an indication to the 82801E C-ICH
that core power and PCICLK have been stable for at least 1 ms. PWROK can
be driven asynchronously. When PWROK is negated, the 82801E C-ICH
asserts PCIRST#.
RCIN#
I
Keyboard Controller Reset Processor:
The keyboard controller can
generate INIT# to the processor. This saves the external OR gate with the
82801E C-ICH’s other sources of INIT#. When the 82801E C-ICH detects the
assertion of this signal, INIT# is generated for 16 PCI clocks.
REQ[3:0]#
REQ[5]#
/REQ[B]#
/GPIO[1]
I
PCI Requests:
The 82801E C-ICH supports up to four masters on the PCI
bus. REQ[5]# is muxed with PC/PCI REQ[B]# (must choose one or the other,
but not both). If not used for PCI or PC/PCI, REQ[5]#/REQ[B]# can instead be
used as GPIO[1].
NOTE:
REQ[0]# is programmable to have improved arbitration latency for
supporting PCI-based 1394 controllers.
REQ[A]#
/GPIO[0]
REQ[B]#
/REQ[5]#
/GPIO[1]
I
PC/PCI DMA Request [A:B]:
This request serializes ISA-like DMA Requests
for the purpose of running ISA-compatible DMA cycles over the PCI bus. This
is used by devices such as PCI-based Super I/O or audio codecs that need to
perform legacy 8237 DMA but have no ISA bus.
When not used for PC/PCI requests, these signals can be used as General
Purpose Inputs. Instead, REQ[B]# can be used as the fourth PCI bus request.
RESERVED1
RESERVED2
—
This signal must have an external pull up to Vcc3_3.
RI#
I
Ring Indicate:
From the modem interface. This signal can be enabled as a
wake event; this is preserved across power failures.
RSM_PWROK
I
Resume Well Power OK:
When asserted, this signal is an indication to the
82801E C-ICH that the resume well power has been stable for at least 10 ms.
NOTE:
The 82801E C-ICH does not use the Resume Well Power OK signal.
RSMRST#
I
Resume Well Reset:
RSMRST# is used for resetting the resume power
plane logic.
NOTE:
The 82801E C-ICH does not use the Resume Well Reset signal.
RTCRST#
I
RTC Reset:
When asserted, this signal resets register bits in the RTC well
and sets the RTC_PWR_STS bit (bit 2 in GEN_PMCON3 register). This
signal is also used to enter the test modes documented in “Test Signals” on
page 49.
NOTE:
Clearing CMOS in an 82801E C-ICH-based platform can be done by
using a jumper on RTCRST# or GPI, or using SAFEMODE strap.
Implementations should not attempt to clear CMOS by using a
jumper to pull VccRTC low.
RTCX1
Special
Crystal Input 1:
This signal is connected to the 32.768 KHz crystal. If no
external crystal is used, then RTCX1 can be driven with the desired clock
rate.
RTCX2
Special
Crystal Input 2:
This signal is connected to the 32.768 KHz crystal. If no
external crystal is used, then RTCX2 should be left floating.
Table 6. 82801E C-ICH Signal Description (Sheet 7 of 11)
Signal
Type
Description
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 82802AB | Firmware Hub (FWH) |
| 82802AC | Firmware Hub (FWH) |
| 8281 | LNB SUPPLY AND CONTROL-VOLTAGE REGULATORS |
| 8282 | OCTAL LATCH |
| 8282 | LNB SUPPLY AND CONTROL-VOLTAGE REGULATORS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 82801FB | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel I/O Controller Hub 6 (ICH6) Family |
| 82801FBM | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel I/O Controller Hub 6 (ICH6) Family |
| 82801FR | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel I/O Controller Hub 6 (ICH6) Family |
| 82801GBICH7 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel I/O Controller Hub 7 |
| 82801GBMICH7-M | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel I/O Controller Hub 7 |
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