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參數(shù)資料
| 型號： | 82801E |
| 廠商： | INTEL CORP |
| 元件分類： | 外設及接口 |
| 英文描述： | Intel 82801E Communications I/O Controller Hub (C-ICH) |
| 中文描述： | MULTIFUNCTION PERIPHERAL, PBGA421 |
| 封裝： | BGA-421 |
| 文件頁數(shù)： | 39/84頁 |
| 文件大?。?/td> | 1196K |
| 代理商： | 82801E |
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Intel
82801E C-ICH
Advance Information Datasheet
39
GNT[3:0]#
/GNT[5]#
/GNT[B]#
/GPIO[17]#
O
PCI Grants:
The 82801E C-ICH supports up to four masters on the PCI bus.
Pull-up resistors are not required on these signals. If pullups are used, they should
be tied to the Vcc3_3 power rail. GNT[B]#/GNT[5]#/GPIO[17] has an internal
pull-up.
PCICLK
I
PCI Clock:
This is a 33 MHz clock. PCICLK provides timing for all transactions on
the PCI Bus.
PCIRST#
O
PCI Reset:
82801E C-ICH asserts PCIRST# to reset devices that reside on the PCI
bus. The 82801E C-ICH asserts PCIRST# during power-up and when S/W initiates
a hard reset sequence through the RC (CF9h) register. The 82801E C-ICH drives
PCIRST# inactive a minimum of 1 ms after PWROK is driven active. The 82801E
C-ICH drives PCIRST# active a minimum of 1 ms when initiated through the RC
register.
PLOCK#
I/O
PCI Lock:
PLOCK# indicates an exclusive bus operation and may require multiple
transactions to complete. 82801E C-ICH asserts PLOCK# when it performs
non-exclusive transactions on the PCI bus.
SERR#
I
System Error:
SERR# can be pulsed active by any PCI device that detects a
system error condition. Upon sampling SERR# active, the 82801E C-ICH has the
ability to generate an NMI, SMI#, or interrupt.
REQ[A]#
/GPIO[0]
REQ[B]#
/REQ[5]#
/GPIO[1]
I
PC/PCI DMA Request [A:B]:
This request serializes ISA-like DMA Requests for
the purpose of running ISA-compatible DMA cycles over the PCI bus. This is used
by devices such as PCI-based Super I/O or audio codecs that need to perform
legacy 8237 DMA but have no ISA bus.
When not used for PC/PCI requests, these signals can be used as General
Purpose Inputs. Instead, REQ[B]# can be used as the fifth PCI bus request.
GNT[A]#
/GPIO[16]
GNT[B]#
/GNT[5]#
/GPIO[17]
O
PC/PCI DMA Acknowledges [A:B]:
This grant serializes an ISA-like DACK# for
the purpose of running DMA/ISA master cycles over the PCI bus. This is used by
devices such as PCI-based Super/IO or audio codecs which need to perform
legacy 8237 DMA but have no ISA bus.
When not used for PC/PCI, these signals can be used as General Purpose
Outputs. GNTB# can also be used as the fifth PCI bus master grant output. These
signal have internal pull-up resistors.
Table 11. PCI Interface Signals (Sheet 3 of 3)
Name
Type
Description
相關PDF資料 |
PDF描述 |
|---|---|
| 82802AB | Firmware Hub (FWH) |
| 82802AC | Firmware Hub (FWH) |
| 8281 | LNB SUPPLY AND CONTROL-VOLTAGE REGULATORS |
| 8282 | OCTAL LATCH |
| 8282 | LNB SUPPLY AND CONTROL-VOLTAGE REGULATORS |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| 82801FB | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel I/O Controller Hub 6 (ICH6) Family |
| 82801FBM | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel I/O Controller Hub 6 (ICH6) Family |
| 82801FR | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel I/O Controller Hub 6 (ICH6) Family |
| 82801GBICH7 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel I/O Controller Hub 7 |
| 82801GBMICH7-M | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel I/O Controller Hub 7 |
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