FireLink USB
82C862
912-2000-030
Revision: 1.0
Page i
T
ABLE
OF
C
ONTENTS
1.0
FEATURES......................................................................................................................................................................1
2.0
OVERVIEW......................................................................................................................................................................1
3.0
SIGNAL DEFINITIONS....................................................................................................................................................3
3.1.1
Terminology/Nomenclature Conventions..............................................................................................................3
3.2
N
UMERICAL
P
IN
C
ROSS
-R
EFERENCE
L
IST
.........................................................................................................................5
3.3
S
IGNAL
D
ESCRIPTIONS
....................................................................................................................................................6
3.3.1
Clock and Reset Interface Signals .......................................................................................................................6
3.3.2
PCI Bus Interface Signals.....................................................................................................................................6
3.3.3
USB Interface Signals ..........................................................................................................................................8
3.3.4
Host Controller shared signals: PME#, SMI#, REQ#, GNT#................................................................................9
3.3.5
Legacy and Interrupt Interface Signals.................................................................................................................9
3.3.6
Power and Ground Pins .....................................................................................................................................10
3.3.7
Strap Options .....................................................................................................................................................11
4.0
FUNCTIONAL DESCRIPTION.......................................................................................................................................13
U
NIVERSAL
S
ERIAL
B
US
(USB) ......................................................................................................................................13
PCI C
ONTROLLER
.........................................................................................................................................................14
C
LOCK
G
ENERATION
.....................................................................................................................................................15
P
OWER
M
ANAGEMENT
F
EATURES
...................................................................................................................................15
4.4.1
Putting FireLink into USBSuspend State............................................................................................................15
4.4.2
Powering Down the USB I/O Cells.....................................................................................................................15
4.4.3
Stopping the 48MHz USB Clock.........................................................................................................................15
4.4.4
Using CLKRUN# ................................................................................................................................................15
4.4.5
Stopping the Internal PCI Clocks........................................................................................................................16
4.4.6
Power Control Modes.........................................................................................................................................16
4.5
H
OST
C
ONTROLLER
.......................................................................................................................................................19
4.5.1
Legacy Support ..................................................................................................................................................20
4.5.2
Intercept Port 60h and 64h Accesses.................................................................................................................20
4.6
G
ENERAL
P
URPOSE
P
INS
...............................................................................................................................................21
4.1
4.2
4.3
4.4
5.0
REGISTER DESCRIPTIONS.........................................................................................................................................23
PCICFG R
EGISTER
S
PACE
...........................................................................................................................................23
5.1.1
Programming Differences from 82C861 Component..........................................................................................23
5.1.2
PCICFG 00h-FFh ...............................................................................................................................................24
5.2
H
OST
C
ONTROLLER
R
EGISTER
S
PACE
............................................................................................................................29
5.2.1
MEMOFST 00h-5Ch...........................................................................................................................................29
5.2.2
Legacy Support Registers..................................................................................................................................39
5.2.3
MEMOFST 100h-1Fh (Legacy Support Registers).............................................................................................39
5.1
6.0
ELECTRICAL RATINGS................................................................................................................................................41
A
BSOLUTE
M
AXIMUM
R
ATINGS
.......................................................................................................................................41
DC C
HARACTERISTICS
: .................................................................................................................................................41
AC C
HARACTERISTICS
(P
RELIMINARY
)............................................................................................................................42
6.3.1
PCI Bus AC Timings...........................................................................................................................................42
6.3.2
USB AC Timings: Full Speed Source.................................................................................................................43
6.3.3
USB AC Timings: Low Speed Source ................................................................................................................44
6.1
6.2
6.3
7.0
MECHANICAL PACKAGE OUTLINES .........................................................................................................................46
8.0
NAND TREE TEST MODE.............................................................................................................................................47