參數(shù)資料
型號(hào): 853S011BGILFT
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時(shí)鐘及定時(shí)
英文描述: LOW SKEW CLOCK DRIVER, PDSO8
封裝: 3 X 3 MM, 0.97 MM HEIGHT, ROHS COMPLIANT, MO-187, TSSOP-8
文件頁(yè)數(shù): 17/20頁(yè)
文件大?。?/td> 825K
代理商: 853S011BGILFT
ICS853S011BGI REVISION A MAY 12, 2010
6
2010 Integrated Device Technology, Inc.
ICS853S011BI Data Sheet
LOW SKEW, 1-TO-2, DIFFERENTIAL-TO-2.5V, 3.3V LVPECL/ECL FANOUT BUFFER
AC Electrical Characteristics
Table 4. AC Characteristics, VCC = -3.8V to -2.375V or , VCC = VCCO = 2.375V to 3.8V; VEE = 0V,
TA = -40°C to 85°C
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is
mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium
has been reached under these conditions.
NOTE: All parameters are measured at f
≤ 1.7GHz, unless otherwise noted.
NOTE 1: Measured from the differential input crossing point to the differential output crossing point.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at the output differential
cross points.
NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltages and with equal load conditions. Using
the same type of inputs on each device, the outputs are measured at the differential cross points.
NOTE 4: This parameter is defined in accordance with JEDEC Standard 65.
Symbol
Parameter
-40°C
25°C
85°C
Units
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
fMAX
Output Frequency
>2.5
GHz
tPD
Propagation Delay; NOTE 1
195
330
210
340
215
355
ps
tsk(o)
Output Skew; NOTE 2, 4
5
20
5
20
5
20
ps
tsk(pp)
Part-to-Part Skew; NOTE 3, 4
130
ps
tjit
Buffer Additive Phase Jitter,
RMS; refer to Additive Phase
Jitter Section
0.026
ps
tR / tF
Output
Rise/Fall Time
20% to 80%
70
250
80
250
90
250
ps
odc
Output Duty Cycle; f
≤ 750MHz
48
50
52
48
50
52
48
50
52
%
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