參數(shù)資料
型號: 853S011BGILFT
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時鐘及定時
英文描述: LOW SKEW CLOCK DRIVER, PDSO8
封裝: 3 X 3 MM, 0.97 MM HEIGHT, ROHS COMPLIANT, MO-187, TSSOP-8
文件頁數(shù): 7/20頁
文件大小: 825K
代理商: 853S011BGILFT
ICS853S011BGI REVISION A MAY 12, 2010
15
2010 Integrated Device Technology, Inc.
ICS853S011BI Data Sheet
LOW SKEW, 1-TO-2, DIFFERENTIAL-TO-2.5V, 3.3V LVPECL/ECL FANOUT BUFFER
3. Calculations and Equations.
The purpose of this section is to derive the power dissipation for the LVPECL output pairs.
LVPECL output driver circuit and termination are shown in Figure 5.
Figure 5. LVPECL Driver Circuit and Termination
To calculate worst case power dissipation into the load, use the following equations which assume a 50 load, and a termination voltage of
VCC – 2V.
For logic high, VOUT = VOH_MAX = VCC_MAX – 0.905V
(VCC_MAX – VOH_MAX) = 0.905V
For logic low, VOUT = VOL_MAX = VCC_MAX – 1.705V
(VCC_MAX – VOL_MAX) = 1.705V
Pd_H is power dissipation when the output drives high.
Pd_L is the power dissipation when the output drives low.
Pd_H = [(VOH_MAX – (VCC_MAX – 2V))/RL] * (VCC_MAX – VOH_MAX) = [(2V – (VCC_MAX – VOH_MAX))/RL] * (VCC_MAX – VOH_MAX) =
[(2V – 0.905V)/50
] * 0.905V = 19.8mW
Pd_L = [(VOL_MAX – (VCC_MAX – 2V))/RL] * (VCC_MAX – VOL_MAX) = [(2V – (VCC_MAX – VOL_MAX))/RL] * (VCC_MAX – VOL_MAX) =
[(2V – 1.705V)/50
] * 1.705V = 10.06mW
Total Power Dissipation per output pair = Pd_H + Pd_L = 29.86mW
V
OUT
V
CC
V
CC - 2V
Q1
RL
50
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