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參數(shù)資料
| 型號： | 935185240518 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 通信及網(wǎng)絡 |
| 英文描述： | SPECIALTY TELECOM CIRCUIT, PDSO20 |
| 封裝： | PLASTIC, SOT-266, SSOP-20 |
| 文件頁數(shù)： | 10/30頁 |
| 文件大?。?/td> | 251K |
| 代理商： | 935185240518 |
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1997 Feb 27
18
Philips Semiconductors
Product specication
Power amplier controller for GSM and
PCN systems
PCF5075
11.2
Additional application information
An evaluation kit with software and demonstration boards
is available for the PCF5075 together with the power
modules BGY20x. Additionally, a package of PSPICE
models with several plots and descriptions is also
available which will provide help for applications.
Very little bus traffic is required for the PCF5075 because
the ramping curves are generated on-chip. VKICK and
VHOME define the start conditions for up-ramping. VPL
determines the power levels. TRIG is the trigger for up and
down-ramping.
The non-linear behaviour of the control curves of the
power modules have a big influence on the loop. Start
conditions in the flat area of the control curve are critical
and need some attention. Initially VO(INT) will be at the
home position. The switches HPA release the regulator.
The integrator now must be moved into the active part of
the control curve. This is achieved by integrating VKICK.
When VO(INT) has reached the active region of the control
curve the loop is closed and the circuit is able to follow the
ramping function generated by a voltage step to the slope
generator. The step height VPL determines the power of
the transmit burst. Down-ramping is started at the slope
generator input by a voltage step from VPL back to
100 mV. The loop follows the leading function for
down-ramping until the RF sensor measures zero. The
sensor signal is not able to go to
100 mV because this
would represent a negative power. The reason for the
100 mV in the leading function is to shorten the tail of
the slope.
For VKICK a value of 60 mV is recommended, matched to
a kick power that is 8 dB below
13 dBm (see Fig.9).
Usually VKICK has a constant value for all power levels.
One of the highlights of the PCF5075 is that for matching
of the start behaviour only one parameter must be adapted
to the individual sample of the power module. This
parameter is the home position of VO(INT) that is set by
VHOMEIN. An optimized value must be chosen in production
for the life of the device. This value can be stored in an
EPROM. Software may help to adapt VHOMEIN to different
temperatures. The VO(INT) home position that has to be
programmed must be matched to the middle of the two
curves illustrated in Fig.9.
VHOMEIN is the sum of VHOME and of the diode forward
voltages with a typical negative temperature behaviour.
Two diodes are necessary for matching the behaviour of
the power module BGY20x. But if two diodes are chosen
(see Table 5), the absolute value of VO(INT) is so high that
there is not enough room for matching the start behaviour.
Therefore, only one diode is recommended for the
modules BGY20x. The fine temperature matching must be
done by software. Details about this matching are shown
in plot 3 of the PSPICE package.
Curve 1 in Fig.9 shows what happens if the home position
of VO(INT) has the highest usable value. This behaviour is
matched to meet the
6 dB margin and the 30 dB margin
at the power level
13 dBm. The 70 dB margin will be met
by optimizing the time where the RF input power of the
power module is activated.
Curve 2 in Fig.9 results if the home position has the lowest
usable value. Here the ramping curve seems to be optimal,
but the switching spectrum is at the limit. This behaviour
occurs when the regulator, which is integrating VKICK, has
not yet reached the active part of the power module control
curve and thus the step of the slope generator has the
highest steepness. In this situation the power ramps-up
with a delay and with increased steepness as can be seen
in the curve.
For the power level
13 dBm the TRIG time may be shifted
a little by software. At all other power levels TRIG can be
kept constant.
11.2.1
THEORETICAL LIMIT FOR CORRECT DOWN-RAMPING
No loop is able to follow a leading value which is beyond a
physical limit. The power limit of any power module
depends on RF input power, transmit frequency, supply
voltage and load impedance. The maximum VPL must be
matched to the worst case output power and reduced by
1 dB. A distance of 1 dB is necessary because the
steepness of the control curve of the power module
decreases for higher output power. Incorrect behaviour is
shown in Fig.10. Curve 1 works correctly, but the module
is at the power limit. If the supply voltage is reduced now,
the theoretical principle of a loop design is violated. Thus
the down-ramping in curve 2 starts with a delay followed
by an increased steepness. The GSM margin for the
switching spectrum will only be met if the maximum value
of VPL is matched to the possibilities of the loop.
The programmable VO(INT) limiter (see Table 4) is foreseen
to protect the power module during error conditions such
as, for example, wrong antenna connection and not to
avoid the down-ramping behaviour of curve 2.
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