參數(shù)資料
型號(hào)： 935185240518
廠商： NXP SEMICONDUCTORS
元件分類： 通信及網(wǎng)絡(luò)
英文描述： SPECIALTY TELECOM CIRCUIT, PDSO20
封裝： PLASTIC, SOT-266, SSOP-20
文件頁(yè)數(shù)： 3/30頁(yè)
文件大?。?/td> 251K
代理商： 935185240518
1997 Feb 27
11
Philips Semiconductors
Product specication
Power amplier controller for GSM and
PCN systems
PCF5075
Fig.6 Modulation spectrum.
handbook, full pagewidth
MBE717
CENTER 902.400 MHz
SPAN 5.000 MHz
# RES BW 30 kHz
# VBW 30 kHz
# SWP 2.00 sec.
LOG
10
dB/
OFFST
16.6
dB
ARFCN
62
TN 0
WA SB
SC FC
CORR
25.7 dBm
# ATTEN 20 dB
OUTPUT RF SPECTRUM
modulation
LIMIT PASS
2.166 MHz
6.5
Serial bus programming
A simple 3
wire unidirectional serial bus is used to
program the circuit. The 3 wires are Data, Clock and
Strobe. The data sent to the device is loaded in bursts
framed by Strobe. Programming clock edges and their
appropriate data bits are ignored until Strobe goes active
LOW. The programmed information is loaded into the
addressed latch when Strobe returns inactive HIGH. Only
the last 16 bits serially clocked into the device are retained
within the programming register. Additional leading bits
are ignored, and no check is made on the number of clock
pulses. The fully static CMOS design uses virtually no
current when the bus is inactive. The bus is also
programmable during power-down.
6.6
Data format
Data is entered with the most significant bit (MSB) first.
The leading bits make up the data field, while the trailing
four bits are an address field. The PCF5075 uses only one
of the available addresses. The format is given in Table 2.
The trailing address bits are decoded upon the inactive
Strobe edge. This produces an internal load pulse to store
the data in one of the addressed latches. To avoid
erroneous circuit operation, the strobe pulse is not allowed
during internal data reads by the rest of the circuit. This
condition is guaranteed by respecting a minimum Strobe
pulse width after data transfer (see Chapter 10).
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