2000
Mar
15
83
Philips
Semiconductors
Preliminar
y
specication
P
AL/NTSC/SECAM
video
decoder
with
adaptiv
e
P
AL/NTSC
comb
lter
,VBI-data
slicer
and
high
perf
or
mance
scaler
SAA7114H
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Raw data gain control
18
RAWG7
RAWG6
RAWG5
RAWG4
RAWG3
RAWG2
RAWG1
RAWG0
Raw data offset control
19
RAWO7
RAWO6
RAWO5
RAWO4
RAWO3
RAWO2
RAWO1
RAWO0
Reserved
1A to 1E
(1)
Status byte video decoder
(read only, OLDSB = 0)
1F
INTL
HLVLN
FIDT
GLIMT
GLIMB
WIPA
COPRO
RDCAP
Status byte video decoder
(read only, OLDSB = 1)
1F
INTL
HLCK
FIDT
GLIMT
GLIMB
WIPA
SLTCA
CODE
Reserved
20 to 2F
(1)
Audio clock generator part: registers 30H to 3FH
Audio master clock cycles per
eld
30
ACPF7
ACPF6
ACPF5
ACPF4
ACPF3
ACPF2
ACPF1
ACPF0
31
ACPF15
ACPF14
ACPF13
ACPF12
ACPF11
ACPF10
ACPF9
ACPF8
32
(1)
ACPF17
ACPF16
Reserved
33
(1)
Audio master clock nominal
increment
34
ACNI7
ACNI6
ACNI5
ACNI4
ACNI3
ACNI2
ACNI1
ACNI0
35
ACNI15
ACNI14
ACNI13
ACNI12
ACNI11
ACNI10
ACNI9
ACNI8
36
(1)
ACNI21
ACNI20
ACNI19
ACNI18
ACNI17
ACNI16
Reserved
37
(1)
Clock ratio AMCLK to ASCLK
38
(1)
SDIV5
SDIV4
SDIV3
SDIV2
SDIV1
SDIV0
Clock ratio ASCLK to ALRCLK
39
(1)
LRDIV5
LRDIV4
LRDIV3
LRDIV2
LRDIV1
LRDIV0
Audio clock control
3A
(1)
APLL
AMVR
LRPH
SCPH
Reserved
3B to 3F
(1)
General purpose VBI-data slicer part: registers 40H to 7FH
Slicer control 1
40
(1)
HAM_N
FCE
HUNT_N
(1)
LCR2 to LCR24 (n = 2 to 24)
41 to 57
LCRn_7
LCRn_6
LCRn_5
LCRn_4
LCRn_3
LCRn_2
LCRn_1
LCRn_0
Programmable framing code
58
FC7
FC6
FC5
FC4
FC3
FC2
FC1
FC0
Horizontal offset for slicer
59
HOFF7
HOFF6
HOFF5
HOFF4
HOFF3
HOFF2
HOFF1
HOFF0
Vertical offset for slicer
5A
VOFF7
VOFF6
VOFF5
VOFF4
VOFF3
VOFF2
VOFF1
VOFF0
Field offset and MSBs for
horizontal and vertical offset
5B
FOFF
RECODE
(1)
VOFF8
(1)
HOFF10
HOFF9
HOFF8
Reserved (for testing)
5C
(1)
REGISTER FUNCTION
SUB
ADDR.
(HEX)
D7
D6
D5
D4
D3
D2
D1
D0