參數(shù)資料
型號: 9S12KT256DGV1
英文描述: MC9S12KT256 Device User Guide
中文描述: MC9S12KT256設備用戶指南
文件頁數(shù): 15/126頁
文件大?。?/td> 7307K
代理商: 9S12KT256DGV1
Device User Guide — 9S12KT256DGV1/D V01.09
15
Freescale Semiconductor
Section 1 Introduction
1.1 Overview
The MC9S12K-Family is a 112/100/80 pin 16-bit Flash-based microcontroller family targeted for high
reliability systems. Members of the MC9S12K-Family have an increased performance in reliability over
the life of the product due to a built-in Error Checking and Correction Code (ECC) in the Flash memory.
The program and erase operations automatically generate six parity bits per word making ECC transparent
to the user.
All members of the MC9S12K-Family are comprised of standard on-chip peripherals including a 16-bit
central processing unit (CPU12), up to 256K bytes of Flash EEPROM, up to 4K bytes of EEPROM, up to
12K bytes of RAM, up to two asynchronous serial communications interface (SCI), up to three serial
peripheral interface (SPI), IIC-bus, an 8-channel IC/OC timer, 16-channel or two 8-channel 10-bit
analog-to-digital converters (ADC), an 8-channel pulse-width modulator (PWM), up to three CAN 2.0 A,
B software compatible modules, 29 discrete digital I/O channels (Port A, Port B, Port E and Port K), and
20 discrete digital I/O lines with interrupt and wakeup capability. The MC9S12K-Family has full 16-bit
data paths throughout, however, the external bus can operate in an 8-bit narrow mode so single 8-bit wide
memory can be interfaced for lower cost systems. The inclusion of a PLL circuit allows power
consumption and performance to be adjusted to suit operational requirements.
1.2 Features
HCS12 Core
16-bit HCS12 CPU
i. Upward compatible with M68HC11 instruction set
ii. Interrupt stacking and programmer’s model identical to M68HC11
iii. Instruction queue
iv. Enhanced indexed addressing
MEBI (Multiplexed External Bus Interface)
MMC (Memory Map and Interface)
INT (Interrupt Controller)
DBG (Debugger)
BDM (Background Debug Mode)
Oscillator
4Mhz to 16Mhz frequency range
Pierce with amplitude loop control
Clock monitor
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