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參數(shù)資料
| 型號： | AD1801 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Single-Chip Fax/Data/ Voice Modem(單片的傳真/數(shù)據(jù)/語音調(diào)制解調(diào)器) |
| 中文描述： | 單芯片傳真/數(shù)據(jù)/語音調(diào)制解調(diào)器（單片的傳真/數(shù)據(jù)/語音調(diào)制解調(diào)器） |
| 文件頁數(shù)： | 18/52頁 |
| 文件大小： | 348K |
| 代理商： | AD1801 |
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AD1801
–18–
REV. 0
PCMCIA Platform Compatible Host PC
The AD1801 is also targeted for use in PCMCIA’s PC Card
Standard slave card designs. It provides a glueless interface to
the PC Card bus whenever the PCM_
ISA
control input is un-
connected or tied to DV
DD
. An internal pull-up allows this pin
to be left unconnected in this mode.
PCMCIA 16-Bit PC Card Bus Interface
The AD1801’s PC Card Bus interface meets the timing specifi-
cations defined for PCMCIA’s PC Card Bus Standard ‘95 for
both memory and I/O access cycles. This interface consists of a
12-bit address bus (SA[11:0]), 16-bit data bus (SD[15:0]), I/O
read and write strobes (
IOR
and
IOW
), card enables (
CE1
and
CE2
), hardware reset (RESET), memory read and write strobes
(
OE
and
WE
), attribute and I/O memory select (
REG
), PC
interrupt/ready control (
IOIS16
) and a read cycle acknowledge
control (
INPK
).
PCMCIA Card Configuration Controller
This module supports up to three card functions. Multiple
function PC Cards require a separate set of Configuration regis-
ters per function. A Primary CIS common to all functions plus
separate Secondary CIS’s, one per function, are also required.
Data for the Card Information Structures (CISs) is loaded into
the internal 512-byte CIS RAM by the DSP during bootstrap
loading. The DSP can obtain the data it needs from both its
internal ROM and, for card-specific data, from an external serial
EEPROM. The DSP sets a control bit in the AD1801 to indi-
cate that RAM initialization has completed. The DSP does not
have read access to the CIS memory.
The host PC can read the CIS memory at any time. If needed,
the
WAIT
control can be activated to extend the read operation
to meet bus cycle timing specifications. The host PC does not
have write access to the CIS memory.
The card’s modem function is implemented primarily within
the AD1801. The RING input can be used to activate the
PCMCIA’s
STSCHG
status line to notify the host PC of ring-
ing on the phone line. The host PC must set the Req_AttnEnab
and SigChg bits in the AD1801’s Extended Status register and
Card Configuration and Status register, respectively, to activate
this feature. A binary audio waveform,
SPKR
, is available for
use in lieu of the AUD output. This bus signal is intended to
drive the host’s loudspeaker. The 1.4 Mb/sec bitstream from
the monitor speaker sigma delta engine provides the binary
audio data stream for this pin. The host PC must set the Audio
bit in the Card Configuration & Status register to enable this
output.
The AD1801 provides two external function ports for support-
ing limited control of communications ICs, such as ethernet
controller and ISDN devices, for example. Each external func-
tion port will consist of a function reset, chip select, address
latch control, power-down control, and a function interrupt
input. This interrupt will be passed on to the host PC if its
particular function enable and interrupt enable controls are
activated. The AD1801 also generates read and write strobes to
facilitate data transfers between the host PC and the communi-
cation IC. Strobe timing is designed to meet the timing require-
ments of Standard Microsystems Corporation’s SMC91C94
Ethernet Controller whenever External Function 1 is accessed
by the host PC. The host PC’s read and write strobes will be
passed through the AD1801 whenever External Function 2 is
accessed by the host PC. Table II identifies the PCMCIA
Function Configuration registers needed to support each card
function.
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