參數(shù)資料
型號(hào): AD1801
廠商: Analog Devices, Inc.
英文描述: Single-Chip Fax/Data/ Voice Modem(單片的傳真/數(shù)據(jù)/語(yǔ)音調(diào)制解調(diào)器)
中文描述: 單芯片傳真/數(shù)據(jù)/語(yǔ)音調(diào)制解調(diào)器(單片的傳真/數(shù)據(jù)/語(yǔ)音調(diào)制解調(diào)器)
文件頁(yè)數(shù): 6/52頁(yè)
文件大小: 348K
代理商: AD1801
AD1801
–6–
REV. 0
VOLTAGE REFERENCE
Min
Typ
Max
Units
CMOUT
External CMOUT Load Current
CMOUT Output Impedance
2.0
2.45
2.7
10
V
μ
A
k
4
SYSTEM SPECIFICATIONS
Min
Typ
Max
±
0.5
±
1
5
Units
System Frequency Response Ripple (Line In to Line Out)
Differential Nonlinearity
Phase Linearity Deviation
dB
Bit
Degrees
STATIC DIGITAL SPECIFICATIONS
Min
Typ
Max
Units
High-Level Input Voltage (V
IH
)
Digital Inputs, Except XTALI
XTALI
Low-Level Input Voltage (V
IL
)
Digital Inputs, Except XTALI
XTALI
High-Level Output Voltage (V
OH
)
Low-Level Output Voltage (V
OL
)
Input Leakage Current (GO/NOGO Tested)
Output Leakage Current (GO/NOGO Tested)
2.0
3.5
DV
DD
+ 0.3
DV
DD
+ 0.3
V
V
–0.3
–0.3
2.4
0.8
1.5
V
V
V
V
μ
A
μ
A
0.4
10
10
–10
–10
TIMING PARAMETERS
(Guaranteed Over Operating Temperature and Digital Supply Range)
Min
Typ
Max
Units
RESET
LO Pulse Width (t
RPWL
)
IOR
/
IOW
Strobe Width (t
STW
)
AEN Setup to
IOR
/
IOW
Falling (t
AESU
)
AEN Hold from
IOR
/
IOW
Rising (t
AEHD
)
Address Setup to
IOR
/
IOW
Falling (t
ADSU
)
Address Hold from
IOR
/
IOW
Rising (t
ADHD
)
Data Hold from
IOR
Rising (t
DHD1
)
Data Hold from
IOW
Rising (t
DHD2
)
IOR
Falling to Valid Read Data (t
RDDV
)
Write Data Setup to
IOW
Rising (t
WDSU
)
100
100
10
0
10
0
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
20
15
40
10
AEN
IOCS16
SBHE
IOR
t
AESU
t
AEHD
t
RDDV
t
DHD1
SD[0:15]
SA[0:15]
t
ADSU
t
ADHD
t
STW
Figure 2. ISA PIO Read Cycle
t
CC
t
CC
t
SCK
t
SCP
t
SCP
t
SCH
t
SCH
t
RD
t
RH
t
SCDH
t
SCDD
CLKOUT
SCLK
DR
TFS
IN
RFS
IN
RFS
OUT
TFS
OUT
DT
TFS
ALTERNATE
FRAME MODE
RFS
MULTICHANNEL
MODE,
FRAME DELAY 0
(MFD = 0)
Figure 1. Serial Port Timing
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