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參數(shù)資料
| 型號： | AD1852JRSZRL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 7/20頁 |
| 文件大小： | 0K |
| 描述： | IC DAC STEREO 24BIT 28-SSOP |
| 產品培訓模塊： | Data Converter Fundamentals DAC Architectures |
| 標準包裝： | 1,500 |
| 位數(shù)： | 24 |
| 數(shù)據(jù)接口： | DSP，I²S，串行，SPI? |
| 轉換器數(shù)目： | 2 |
| 電壓電源： | 模擬和數(shù)字 |
| 功率耗散（最大）： | 265mW |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-SSOP（0.209"，5.30mm 寬） |
| 供應商設備封裝： | 28-SSOP |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 4 電壓，單極 |
| 采樣率（每秒）： | 192k |
AD1852
Rev. A | Page 15 of 20
CONTROL REGISTER
Table 16 shows the functions of the control register. The control
register is addressed by having a 01 in the bottom two bits of the
16-bit SPI word. The top 14 bits are then used for the control register.
DE-EMPHASIS
The AD1852 has a built-in, de-emphasis filter that can be used
to decode CDs that have been encoded with the standard Red
Book 50 μs/15 μs emphasis response curve. Three curves are
available; one each for the 32 kHz, 44.1 kHz, and 48 kHz
sampling rates. The external DEEMP pin (Pin 9) turns on the
44.1 kHz de-emphasis filter. The other filters may be selected by
writing to Control Bit 2 and Control Bit 3 in the control register.
If the SPI port is used to control the de-emphasis filter, the
external DEEMP pin should be tied low.
OUTPUT IMPEDANCE
The output impedance of the AD1852 is 65 Ω ± 30%.
RESET
The AD1852 may be reset either by a dedicated hardware pin
(RESET, Pin 24) or by software via the SPI control port. When
reset is active, normal operation of the AD1852 is suspended,
and the outputs assume midscale values. The AD1852 should
always be reset at power up. The RESET function should be
active for a minimum of 64 master clock periods. When the
RESET function becomes inactive, normal operation continues
after a delay equal to the group delay, plus three MCLK periods.
Using the RESET pin, the internal registers are set to their
default values, when the RESET pin is active low. When RESET
rises, the default operation is enabled. Alternatively, the internal
registers can be reset to their default values by setting Bit 7 of
the internal control register high. When Bit 7 is reset low,
default operation continues. The software reset differs from the
hardware reset because the soft reset does not affect the values
stored in the SPI registers.
CONTROL SIGNALS
The IDPM0 and IDPM1 control inputs are normally connected
high or low to establish the operating state of the AD1852, as
described in Table 12. They can be changed dynamically (and
asynchronously to LRCLK and the master clock), but it is
possible that a click or pop sound will result during the
transition from one serial mode to another. If possible, the
AD1852 should be placed in mute before such a change is
made.
Table 16. Control Register Functions
Bit Number
Function
Bit 11
INT 2× mode OR’d with Pin 7 (192/48); default = 0
Bit 10
INT 4× mode OR’d with Pin 10 (96/48); default = 0
Bit 9:8
Number of bits in right-justified serial mode
0:0 = 24
0:1 = 20
1:0 = 16
Default = 0:0
Bit 7
Reset; default = 0
Bit 6
Soft mute OR’d with pin; default = 0
Bit 5:4
Serial mode OR’d with mode pins; IDPM1:IDPM0
0:0 = right-justified
0:1 = I2S
1:0 = left-justified
1:1 = DSP mode
Default = 0:0
Bit 3:2
De-emphasis filter select
0:0 = no filter
0:1 = 44.1 kHz filter
1:0 = 32 kHz filter
1:1 = 48 kHz filter
Default = 0:0
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD1853 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Stereo, 24-Bit, 192 kHz, Multibit DAC |
| AD1853JRS | 制造商:Analog Devices 功能描述:DAC 2-CH Delta-Sigma 24-bit 28-Pin SSOP 制造商:Rochester Electronics LLC 功能描述:STEREO, 192KHZ MULTIBIT SIGMA DELTA DAC - Bulk 制造商:Analog Devices 功能描述:IC STEREO 24-BIT DAC |
| AD1853JRSRL | 制造商:Analog Devices 功能描述:DAC 2-CH Delta-Sigma 24-bit 28-Pin SSOP T/R 制造商:Rochester Electronics LLC 功能描述:STEREO, 192KHZ MULTIBIT SIGMA DELTA DAC - Bulk |
| AD1853JRSZ | 功能描述:IC DAC STEREO 24BIT 28SSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉換器 系列:- 標準包裝:1 系列:- 設置時間:4.5µs 位數(shù):12 數(shù)據(jù)接口:串行，SPI? 轉換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應商設備封裝:8-SOICN 包裝:剪切帶 (CT) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:* 其它名稱:MCP4921T-E/SNCTMCP4921T-E/SNRCTMCP4921T-E/SNRCT-ND |
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