參數(shù)資料
型號: AD5259EVAL
廠商: Analog Devices Inc
文件頁數(shù): 9/24頁
文件大?。?/td> 0K
描述: BOARD EVAL FOR AD5259 DGTL POT
標準包裝: 1
主要目的: 數(shù)字電位器
已用 IC / 零件: AD5259
已供物品:
相關產(chǎn)品: AD5259BCPZ5-R7TR-ND - IC POT DGTL 5K 256POS 10LFCSP
AD5259BCPZ50-R7TR-ND - IC POT DGTL 50K 256POS 10LFCSP
AD5259BCPZ10-R7TR-ND - IC POT DGTL 10K 256POS 10LFCSP
AD5259BCPZ100-R7TR-ND - IC POT DGTL 100K 256POS 10LFCSP
AD5259BRMZ5-ND - IC POT DGTL 5K 256POS 10-MSOP
AD5259BRMZ50-ND - IC POT DGTL 50K 256POS 10-MSOP
AD5259BRMZ5-R7-ND - IC POT DGTL 5K 256POS 10MSOP
AD5259BRMZ100-R7-ND - IC POT DGTL 100K 256POS 10MSOP
AD5259BRMZ10-R7-ND - IC POT DGTL 10K 256POS 10MSOP
AD5259BRMZ50-R7-ND - IC POT DGTL 50K 256POS 10MSOP
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Data Sheet
AD5259
Rev. C | Page 17 of 24
READ MODES
Read modes are referred to as traditional because the first two bytes for all three cases are dummy bytes, which function to place the
pointer towards the correct register; this is the reason for the repeat start. Theoretically, this step can be avoided if the user reads a register
previously written to. For example, if the EEPROM was just written to, the user can then skip the two dummy bytes and proceed directly
to the slave address byte, followed by the EEPROM readback data.
Table 11. Traditional Readback of RDAC Register Value
S
7-Bit Device Address
0 SA 0 0 0 0 0 0 0 0 SA S
7-Bit Device Address
1 SA D7 D6 D5 D4 D3 D2 D1 D0 NA P
Slave Address Byte
Instruction Byte
Slave Address Byte
Read Back Data
Repeat start
Table 12. Traditional Readback of Stored EEPROM Value
S
7-Bit Device Address
0 SA 0 0 1 0 0 0 0 0 SA S
7-Bit Device Address
1 SA D7 D6 D5 D4 D3 D2 D1 D0 NA P
Slave Address Byte
Instruction Byte
Slave Address Byte
Read Back Data
Repeat start
STORE/RESTORE MODES
Table 13. Storing RDAC Value to EEPROM
S
7-Bit Device Address
0
SA
1
0
SA
P
Slave Address Byte
Instruction Byte
Table 14. Restoring EEPROM to RDAC1
S
7-Bit Device Address
0
SA
1
0
1
0
SA
P
Slave Address Byte
Instruction Byte
1 User should issue an NOP command immediately after this command to conserve power.
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