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參數(shù)資料
| 型號(hào)： | AD5263BRU50-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 20/28頁 |
| 文件大小： | 0K |
| 描述： | IC DGTL POT QUAD 256POS 24-TSSOP |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 接片： | 256 |
| 電阻（歐姆）： | 50k |
| 電路數(shù)： | 4 |
| 溫度系數(shù)： | 標(biāo)準(zhǔn)值 30 ppm/°C |
| 存儲(chǔ)器類型： | 易失 |
| 接口： | I²C，SPI（芯片選擇，設(shè)備位址） |
| 電源電壓： | 2.7 V ~ 5.5 V，5 V ~ 15 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 24-TSSOP |
| 包裝： | 帶卷 (TR) |
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Data Sheet
AD5263
Rev. F | Page 27 of 28
RESISTANCE SCALING
The AD5263 offers 20 k, 50 k, and 200 k nominal resistances.
Users who need a lower resistance and the same number of step
adjustments can place multiple devices in parallel. For example,
Figure 67 shows a simple scheme of using two channels in parallel.
To adjust half of the resistance linearly per step, users need to
program both channels to the same settings.
03142-
066
W2
A1
B1
A2
B2
LED
VDD
W1
Figure 67. Reduce Resistance by Half with Linear Adjustment Characteristics
Applicable only to the voltage divider mode, by connecting a
discrete resistor in parallel as shown in Figure 68, a proportionately
lower voltage appears at Terminal A. This translates into a finer
degree of precision because the step size at Terminal W is smaller.
The voltage can be found as
(
) (
)
R1
R
R1
R
R2
V
D
V
AB
DD
W
||
256
)
(
×
+
×
=
(17)
03142-
067
W
A
B
R1
R2
R1 << RAB
VDD
Figure 68. Decreasing Step Size by Lowering the Nominal Resistance
Figure 67 and Figure 68 show applications in which the digital
potentiometers change steps linearly. On the other hand, log
taper adjustment is usually preferred in applications such as
volume control. Figure 69 shows another method of resistance
scaling which produces a pseudolog taper output. In this circuit,
the smaller the value of R2 with respect to RAB, the more the
output approaches log type behavior.
03142-
068
VI
VO
A
B
R1
R2
Figure 69. Resistor Scaling with Log Adjustment Characteristics
RESISTANCE TOLERANCE, DRIFT, AND
TEMPERATURE COEFFICIENT MISMATCH
CONSIDERATIONS
In rheostat mode operation, such as the gain control circuit of
Figure 70, the tolerance mismatch between the digital potent-
iometer and the discrete resistor can cause repeatability issues
among various systems. Because of the inherent matching of the
silicon process, it is practical to apply the multichannel device
in this type of application. As such, R1 should be replaced by
one of the channels of the digital potentiometer. R1 should be
programmed to a specific value while R2 can be used for the
adjustable gain. Although it adds cost, this approach minimizes
the tolerance and temperature coefficient mismatch between R1
and R2. In addition, this approach also tracks the resistance drift
over time. As a result, these nonideal parameters become less
sensitive to system variations.
03142-
070
U1
C1
VI
R2
R11
VO
+
–
AD8601
W
B
A
1REPLACED WITH ANOTHER CHANNEL OF RDAC
Figure 70. Linear Gain Control with Tracking Resistance Tolerance and Drift
Notice that the circuit in Figure 71 can also be used to track the
tolerance, temperature coefficient, and drift in this particular
application. However, the characteristics of the transfer function
change from a linear to a pseudologarithmic gain function.
03142-
071
U1
VI
VO
V+
+
–
AD8601
B
W
A
R
C1
Figure 71. Nonlinear Gain Control with Tracking Resistance Tolerance
and Drift
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