參數(shù)資料
型號(hào): AD5263BRU50-REEL7
廠商: Analog Devices Inc
文件頁(yè)數(shù): 3/28頁(yè)
文件大?。?/td> 0K
描述: IC DGTL POT QUAD 256POS 24-TSSOP
標(biāo)準(zhǔn)包裝: 1,000
接片: 256
電阻(歐姆): 50k
電路數(shù): 4
溫度系數(shù): 標(biāo)準(zhǔn)值 30 ppm/°C
存儲(chǔ)器類型: 易失
接口: I²C,SPI(芯片選擇,設(shè)備位址)
電源電壓: 2.7 V ~ 5.5 V,5 V ~ 15 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 24-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 24-TSSOP
包裝: 帶卷 (TR)
Data Sheet
AD5263
Rev. F | Page 11 of 28
G
AI
N
(
d
B)
–60
0
100k
10k
–42
–30
–6
1k
–12
–18
–24
–36
–48
–54
FREQUENCY (Hz)
0x01
0x02
0x80
0x40
0x20
0x04
0x08
0x10
03142-
0-
019
TA = 25°C
VA = 50mV rms
VDD/VSS = ±5V
Figure 21. Gain vs. Frequency vs. Code; RAB = 200 k
1M
–60
0
100k
10k
–42
–30
–6
1k
–12
–18
–24
–36
–48
–54
03142-
020
R = 50k
150kHz
R = 200k
35kHz
TA = 25°C
VDD/VSS = ±5V
VA = 50mV rms
G
AI
N
(
d
B)
FREQUENCY (Hz)
R = 20k
300kHz
Figure 22. Gain vs. Frequency at –3 db Bandwidth
1M
0
80
10k
1k
40
20
100
60
100k
03142-
021
CODE = 0x80, VA = VDD, VB = 0V
+PSRR @
VDD/VSS = ±5V DC ± 10% p-p AC
–PSRR @
VDD/VSS = ±5V DC ± 10% p-p AC
P
S
RR
(
–d
B)
FREQUENCY (Hz)
Figure 23. PSRR vs. Frequency
VW
CODE = 0x80
VDD/VSS = ±5.5V
VB/VA= ±5V
03142-
022
CH1 50.0mV
M100ns
A CH2
2.70V
1
Figure 24. Digital Feedthrough
VW
VDD/VSS = 5/0V
VA = 5V
VB = 0V
03142-
023
T
CH1 50.0mV
M2.00s
T20.00%
A CH2
2.00V
1
Figure 25. Midscale Glitch; Code 0x80 to 0x7F
(4.7 nF Capacitor Used from Wiper to Ground)
VW
VDD/VSS = ±5.5V
VA/VB = ±5V
CS
03142-
024
CH1 5.00V
CH2 5.00V
M400ns
A CH1
2.70V
2
1
Figure 26. Large Signal Settling Time; Code 0x00 to 0xFF
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