I2C-COMPATIBLE DIGITAL INTERFACE (DIS = 1)
參數(shù)資料
型號(hào): AD5263BRU50-REEL7
廠商: Analog Devices Inc
文件頁數(shù): 8/28頁
文件大小: 0K
描述: IC DGTL POT QUAD 256POS 24-TSSOP
標(biāo)準(zhǔn)包裝: 1,000
接片: 256
電阻(歐姆): 50k
電路數(shù): 4
溫度系數(shù): 標(biāo)準(zhǔn)值 30 ppm/°C
存儲(chǔ)器類型: 易失
接口: I²C,SPI(芯片選擇,設(shè)備位址)
電源電壓: 2.7 V ~ 5.5 V,5 V ~ 15 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 24-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 24-TSSOP
包裝: 帶卷 (TR)
AD5263
Data Sheet
Rev. F | Page 16 of 28
I2C-COMPATIBLE DIGITAL INTERFACE (DIS = 1)
The word format maps in this section use the following abbreviations.
Abbreviation
Description
S
Start condition.
P
Stop condition.
A
Acknowledge.
AD1, AD0
I2C device address bits. Must match with the logic states at Pin AD1 and Pin AD0. Refer to Figure 49.
A1, A0
RDAC channel select.
RS
Software reset wiper (A1, A0) to midscale position.
SD
Shutdown active high; ties wiper (A1, A0) to Terminal B, opens Terminal A, RDAC register contents are not disturbed.
To exit shutdown, the command SD = 0 must be executed for each RDAC (A1, A0).
O1, O2
Data to digital output pins, Pin O1 and Pin O2 in I2C mode, used to drive external logic. The logic high level is
determined by V
L and the logic low level is GND.
W
Write = 0.
R
Read = 1.
D7, D6, D5, D4, D3,
D2, D1, D0
Data bits.
X
Don’t care.
I2C WRITE MODE DATA-WORD FORMAT
S
0
1
0
1
AD1
AD0
W
A
X
A1
A0
RS
SD
O1
O2
X
A
D7
D6
D5
D4
D3
D2
D1
D0
A
P
Slave Address Byte
Instruction Byte
Data Byte
I2C READ MODE DATA-WORD FORMAT
S
0
1
0
1
AD1
AD0
R
A
D7
D8
D5
D4
D3
D2
D1
D0
A
P
Slave Address Byte
Data Byte
03142-
041
SCL
SDA
P
S
P
S
t8
t9
t8
t3
t2
t1
t4
t7
t5
t10
t2
Figure 42. Detailed I2C Timing Diagram
SCL
START BY
MASTER
ACK BY
AD5263
STOP BY
MASTER
SDA
0
1
0
1
AD1 AD0 R/W
X
A1
RS
SD
O1
O2
X
1
9
1
9
D7
D6
D5
D4
D3
D2
D1
D0
ACK BY
AD5263
1
9
ACK BY
AD5263
A0
03142-
042
FRAME 1
SLAVE ADDRESS BYTE
FRAME 1
INSTRUCTION BYTE
FRAME 1
DATABYTE
Figure 43
. Writing to the RDAC Register
03142-
043
NO ACK
BY MASTER
SCL
SDA
0
1
0
1
AD1 AD0 R/W
D7
D6
D5
D4
D3
D2
D1
D0
1
9
1
9
FRAME 1
FRAME 2
START BY
MASTER
ACK BY
AD5263
SLAVE ADDRESS BYTE
RDAC REGISTER
STOP BY
MASTER
Figure 44. Reading Data from a Previously Selected RDAC Register in Write Mode
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