參數(shù)資料
型號(hào)： AD5302BRMZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 10/24頁(yè)
文件大小： 0K
描述： IC DAC 8BIT DUAL R-R 10-MSOP
產(chǎn)品培訓(xùn)模塊： Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝： 50
設(shè)置時(shí)間： 6µs
位數(shù)： 8
數(shù)據(jù)接口： 串行
轉(zhuǎn)換器數(shù)目： 2
電壓電源： 單電源
功率耗散（最大）： 2.5mW
工作溫度： -40°C ~ 105°C
安裝類型： 表面貼裝
封裝/外殼： 10-TFSOP，10-MSOP（0.118"，3.00mm 寬）
供應(yīng)商設(shè)備封裝： 10-MSOP
包裝： 管件
輸出數(shù)目和類型： 2 電壓，單極；2 電壓，雙極
采樣率（每秒）： 167k
產(chǎn)品目錄頁(yè)面： 782 (CN2011-ZH PDF)
AD5302/AD5312/AD5322
Rev. D | Page 18 of 24
APPLICATIONS INFORMATION
TYPICAL APPLICATION CIRCUIT
The AD5302/AD5312/AD5322 can be used with a wide range
of reference voltages, especially if the reference inputs are
configured to be unbuffered, in which case the devices offer full,
one-quadrant multiplying capability over a reference range of
0 V to VDD. More typically, the AD5302/AD5312/AD5322 can
be used with a fixed, precision reference voltage. Figure 38
shows a typical setup for the AD5302/AD5312/AD5322
when using an external reference. If the reference inputs are
unbuffered, the reference input range is from 0 V to VDD, but if
the on-chip reference buffers are used, the reference range is
reduced. Suitable references for 5 V operation are the AD780
and REF192 (2.5 V references). For 2.5 V operation, a suitable
external reference would be the REF191, a 2.048 V reference.
SCLK
DIN
GND
AD5302/AD5312/
AD5322
SERIAL
INTERFACE
EXT
REF
00
92
8-
03
8
AD780/REF192
WITH VDD = 5V
OR REF191 WITH
VDD = 2.5V
VOUT
SYNC
VOUTA
VOUTB
VREFA
VREFB
1F
VDD = 2.5V to 5.5V
VDD
Figure 38. AD5302/AD5312/AD5322 Using External Reference
If an output range of 0 V to VDD is required when the reference
inputs are configured as unbuffered (for example, 0 V to 5 V),
the simplest solution is to connect the reference inputs to VDD.
As this supply cannot be very accurate and can be noisy, the
AD5302/AD5312/AD5322 can be powered from the reference
voltage, for example, a 5 V reference such as the REF195, as
shown in Figure 39. The REF195 outputs a steady supply
voltage for the AD5302/AD5312/AD5322. The current required
from the REF195 is 300 μA supply current and approximately
30 μA into each reference input. This is with no load on the
DAC outputs. When the DAC outputs are loaded, the REF195
also needs to supply the current to the loads. The total current
required (with a 10 kΩ load on each output) is
mA
36
.
1
k
10
V
5
2
μA
360
=
Ω
+
The load regulation of the REF195 is typically 2 ppm/mA,
which results in an error of 2.7 ppm (13.5 μV) for the 1.36 mA
current drawn from it. This corresponds to a 0.0007 LSB error
at eight bits and a 0.011 LSB error at 12 bits.
SCLK
DIN
GND
AD5302/AD5312/
AD5322
SERIAL
INTERFACE
REF195
00
92
8-
03
9
VOUT
SYNC
VOUTA
VOUTB
VDD
VREFA
1F
6V to 16V
GND
VIN
VREFB
0.1F
10F
Figure 39. Using a REF195 as Power and Reference to the
AD5302/AD5312/AD5322
BIPOLAR OPERATION USING THE
AD5302/AD5312/AD5322
The AD5302/AD5312/AD5322 are designed for single-supply
operation, but bipolar operation is also achievable using the
circuit shown in Figure 40. This circuit is configured to achieve
an output voltage range of –5 V < VOUT < +5 V. Rail-to-rail
operation at the amplifier output is achievable using an AD820
or OP295 as the output amplifier.
SCLK
DIN
GND
AD5302/AD5312/
AD5322
SERIAL
INTERFACE
REF195
009
28-
0
40
VOUT
SYNC
VOUTA/B
VREFA/B
1F
GND
VIN
6V to 16V
0.1F
10F
VDD
VDD = 5V
+5V
–5V
R2
10k
AD820/
OP295
R1
10k
±5V
Figure 40. Bipolar Operation Using the AD5302/AD5312/AD5322
The output voltage for any input code can be calculated as
follows:
(
) ()
()
1
/
2
1
2
1
2
/
R
V
R
D
V
REF
N
REF
OUT
×
+
×
=
where:
D is the decimal equivalent of the code loaded to the DAC.
N is the DAC resolution.
VREF is the reference voltage input.
If VREF = 5 V, R1 = R2 = 1 kΩ, and VDD = 5 V:
(
) V
5
2
/
10
×
=
N
OUT
D
V
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