參數(shù)資料
型號: AD5302BRMZ
廠商: Analog Devices Inc
文件頁數(shù): 13/24頁
文件大?。?/td> 0K
描述: IC DAC 8BIT DUAL R-R 10-MSOP
產(chǎn)品培訓模塊: Data Converter Fundamentals
DAC Architectures
標準包裝: 50
設(shè)置時間: 6µs
位數(shù): 8
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 2
電壓電源: 單電源
功率耗散(最大): 2.5mW
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 10-TFSOP,10-MSOP(0.118",3.00mm 寬)
供應商設(shè)備封裝: 10-MSOP
包裝: 管件
輸出數(shù)目和類型: 2 電壓,單極;2 電壓,雙極
采樣率(每秒): 167k
產(chǎn)品目錄頁面: 782 (CN2011-ZH PDF)
AD5302/AD5312/AD5322
Rev. D | Page 20 of 24
COARSE AND FINE ADJUSTMENT USING THE
AD5302/AD5312/AD5322
The DACs in the AD5302/AD5312/AD5322 can be paired
together to form a coarse and fine adjustment function, as
shown in Figure 44. DAC A is used to provide the coarse
adjustment while DAC B provides the fine adjustment. Varying
the ratio of R1 and R2 changes the relative effect of the coarse
and fine adjustments. With the resistor values and external
reference shown, the output amplifier has unity gain for the
DAC A output, so the output range is 0 V to 2.5 V 1 LSB. For
DAC B, the amplifier has a gain of 7.6 × 10–3, giving DAC B a
range equal to 19 mV.
The circuit is shown with a 2.5 V reference, but reference
voltages up to VDD can be used. The op amps indicated allow a
rail-to-rail output swing.
GND
AD5302/AD5312/
AD5322
EXT
REF
0
09
28-
0
44
VOUT
VOUTB
VREFA
1F
GND
VIN
0.1F
10F
VDD
VDD = 5V
+5V
AD820/
OP295
VOUTA
VREFB
R2
51.2k
R1
390
VOUT
R4
900
R3
51.2k
R2
51.2k
Figure 44. Coarse/Fine Adjustment
POWER SUPPLY BYPASSING AND GROUNDING
In any circuit where accuracy is important, careful considera-
tion of the power supply and ground return layout helps to
ensure the rated performance. The printed circuit board on
which the AD5302/AD5312/AD5322 is mounted should be
designed so that the analog and digital sections are separated
and confined to certain areas of the board. If the AD5302/
AD5312/AD5322 are in a system where multiple devices require
an AGND-to-DGND connection, the connection should be
made at one point only. The star ground point should be
established as close as possible to the AD5302/AD5312/
AD5322. The part should have ample supply bypassing of 10 μF
in parallel with 0.1 μF on the supply located as close as possible
to the package, ideally right up against the device. The 10 μF
capacitors are the tantalum bead type. The 0.1 μF capacitor
should have low effective series resistance (ESR) and effective
series inductance (ESI), similar to the common ceramic types
that provide a low impedance path to ground at high frequencies
that handle transient currents due to internal logic switching.
The power supply lines of the AD5302/AD5312/AD5322
should use as large a trace as possible to provide low impedance
paths and reduce the effects of glitches on the power supply line.
Fast switching signals such as clocks should be shielded with
digital ground to avoid radiating noise to other parts of the board,
and should never be run near the reference inputs. Avoid crossover
of digital and analog signals. Traces on opposite sides of the
board should run at right angles to each other. This reduces the
effects of feedthrough through the board. A microstrip technique
is by far the best, but is not always possible with a double-sided
board. In this technique, the component side of the board is dedi-
cated to ground while signal traces are placed on the solder side.
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