VDD = 2.5 V to 5.5 V, V
參數(shù)資料
型號: AD5302BRMZ
廠商: Analog Devices Inc
文件頁數(shù): 18/24頁
文件大小: 0K
描述: IC DAC 8BIT DUAL R-R 10-MSOP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 50
設(shè)置時間: 6µs
位數(shù): 8
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 2
電壓電源: 單電源
功率耗散(最大): 2.5mW
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 10-TFSOP,10-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 10-MSOP
包裝: 管件
輸出數(shù)目和類型: 2 電壓,單極;2 電壓,雙極
采樣率(每秒): 167k
產(chǎn)品目錄頁面: 782 (CN2011-ZH PDF)
AD5302/AD5312/AD5322
Rev. D | Page 3 of 24
SPECIFICATIONS
VDD = 2.5 V to 5.5 V, VREF = 2 V, RL = 2 kΩ to GND, CL = 200 pF to GND, all specifications TMIN to TMAX, unless otherwise noted.
Table 1.
A Version1
B Version1
Parameter2
Min
Typ
Max
Min
Typ
Max
Unit
Test Conditions/Comments
DC PERFORMANCE3, 4
AD5302
Resolution
8
Bits
Relative Accuracy
±0.15
±1
±0.15
±0.5
LSB
Differential Nonlinearity
±0.02
±0.25
±0.02
±0.25
LSB
Guaranteed monotonic by design over all codes
AD5312
Resolution
10
Bits
Relative Accuracy
±0.5
±4
±0.5
±2
LSB
Differential Nonlinearity
±0.05
±0.5
±0.05
±0.5
LSB
Guaranteed monotonic by design over all codes
AD5322
Resolution
12
Bits
Relative Accuracy
±2
±16
±2
±8
LSB
Differential Nonlinearity
±0.2
±1
±0.2
±1
LSB
Guaranteed monotonic by design over all codes
Offset Error
±0.4
±3
±0.4
±3
% of FSR
See
Gain Error
±0.15
±1
±0.15
±1
% of FSR
See
Lower Deadband
10
60
10
60
mV
See
Offset Error Drift5
12
ppm of
FSR/°C
Gain Error Drift5
5
ppm of
FSR/°C
Power Supply Rejection
60
dB
VDD = ±10%
30
μV
DAC REFERENCE INPUTS5
VREF Input Range
1
VDD
1
VDD
V
Buffered reference mode
0
VDD
0
VDD
V
Unbuffered reference mode
VREF Input Impedance
>10
Buffered reference mode
180
Unbuffered reference mode, input impedance = RDAC
Reference Feedthrough
90
dB
Frequency = 10 kHz
Channel-to-Channel
Isolation
80
dB
Frequency = 10 kHz
OUTPUT CHARACTERISTICS5
Minimum Output Voltage6
0.001
V min
A measure of the minimum drive capability of
the output amplifier
Maximum Output Voltage6
VDD
0.001
VDD
0.001
V max
A measure of the maximum drive capability of
the output amplifier
DC Output Impedance
0.5
Ω
Short-Circuit Current
50
mA
VDD = 5 V
20
mA
VDD = 3 V
Power-Up Time
2.5
μs
Coming out of power-down mode, VDD = 5 V
5
μs
Coming out of power-down mode, VDD = 3 V
LOGIC INPUTS5
Input Current
±1
μA
VIL, Input Low Voltage
0.8
V
VDD = 5 V ± 10%
0.6
V
VDD = 3 V ± 10%
0.5
V
VDD = 2.5 V
VIH, Input High Voltage
2.4
V
VDD = 5 V ± 10%
2.1
V
VDD = 3 V ± 10%
2.0
V
VDD = 2.5 V
Pin Capacitance
2
3.5
2
3.5
pF
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